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Searched refs:CLK_TOP_AUD_MUX1_DIV (Results 1 – 3 of 3) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt2701-clk.h143 #define CLK_TOP_AUD_MUX1_DIV 132 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt2701.c614 DIV_ADJ(CLK_TOP_AUD_MUX1_DIV, "aud_mux1_div", "aud_mux1_sel",
/linux/arch/arm/boot/dts/mediatek/
H A Dmt2701.dtsi506 <&topckgen CLK_TOP_AUD_MUX1_DIV>,