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Searched refs:CLK_TOP_AUD_APLL1_SEL (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt2712-clk.h198 #define CLK_TOP_AUD_APLL1_SEL 167 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt2712.c751 MUX(CLK_TOP_AUD_APLL1_SEL, "aud_apll1_sel", aud_apll1_parents, 0x134, 0, 1),