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Searched refs:CLK_TOP_AUDIO_SEL (Results 1 – 25 of 25) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt6735-topckgen.h65 #define CLK_TOP_AUDIO_SEL 57 macro
H A Dmt8135-clk.h91 #define CLK_TOP_AUDIO_SEL 80 macro
H A Dmt7629-clk.h99 #define CLK_TOP_AUDIO_SEL 89 macro
H A Dmt7622-clk.h90 #define CLK_TOP_AUDIO_SEL 78 macro
H A Dmediatek,mt6795-clk.h108 #define CLK_TOP_AUDIO_SEL 97 macro
H A Dmt8173-clk.h110 #define CLK_TOP_AUDIO_SEL 100 macro
H A Dmt6765-clk.h146 #define CLK_TOP_AUDIO_SEL 111 macro
H A Dmediatek,mt8365-clk.h86 #define CLK_TOP_AUDIO_SEL 76 macro
H A Dmt2712-clk.h147 #define CLK_TOP_AUDIO_SEL 116 macro
H A Dmt2701-clk.h100 #define CLK_TOP_AUDIO_SEL 89 macro
H A Dmt8192-clk.h39 #define CLK_TOP_AUDIO_SEL 27 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt6735-topckgen.c351 …MUX_GATE_CLR_SET_UPD(CLK_TOP_AUDIO_SEL, "audio_sel", audio_sel_parents, CLK_CFG_4, CLK_CFG_4_SET, …
H A Dclk-mt6795-topckgen.c478 TOP_MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents, 0x80, 16, 2, 23, 0),
H A Dclk-mt8173-topckgen.c561 MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents,
H A Dclk-mt8135.c379 MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents, 0x0158, 24, 2, 31),
H A Dclk-mt7622.c440 MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents,
H A Dclk-mt7629.c498 MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents,
H A Dclk-mt2712.c672 MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents,
H A Dclk-mt8365.c449 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents,
H A Dclk-mt8192.c612 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUDIO_SEL, "audio_sel",
H A Dclk-mt6765.c418 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents,
H A Dclk-mt2701.c518 MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", msdc30_parents,
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8365.dtsi823 <&topckgen CLK_TOP_AUDIO_SEL>,
H A Dmt8173.dtsi867 <&topckgen CLK_TOP_AUDIO_SEL>,
H A Dmt8192.dtsi1007 <&topckgen CLK_TOP_AUDIO_SEL>,