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Searched refs:CLK_TOP_APLL_I2S1_SEL (Results 1 – 3 of 3) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h116 #define CLK_TOP_APLL_I2S1_SEL 106 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8365.c397 MUX(CLK_TOP_APLL_I2S1_SEL, "apll_i2s1_sel", apll_i2s_parents, 0x0320, 12, 1),
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8365.dtsi833 <&topckgen CLK_TOP_APLL_I2S1_SEL>,