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Searched refs:CLK_TOP_APLL12_CK_DIV5 (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt8516-clk.h202 #define CLK_TOP_APLL12_CK_DIV5 170 macro
H A Dmediatek,mt8365-clk.h128 #define CLK_TOP_APLL12_CK_DIV5 118 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8167.c680 DIV_ADJ(CLK_TOP_APLL12_CK_DIV5, "apll12_ck_div5", "aud_i2s5_m_sel",
H A Dclk-mt8365.c565 DIV_ADJ_F(CLK_TOP_APLL12_CK_DIV5, "apll12_ck_div5", "apll_tdmin_sel",