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Searched refs:CLK_TOP2_MMINFRA_AO (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt8196-topckgen2.c537 MUX_GATE_HWV_FENC_CLR_SET_UPD(CLK_TOP2_MMINFRA_AO, "mminfra_ao", mminfra_ao_parents,
/linux/include/dt-bindings/clock/
H A Dmediatek,mt8196-clock.h177 #define CLK_TOP2_MMINFRA_AO 22 macro