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Searched refs:CLK_SSS (Results 1 – 12 of 12) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dexynos5410.h62 #define CLK_SSS 471 macro
H A Dexynos5250.h152 #define CLK_SSS 348 macro
H A Dexynos4.h93 #define CLK_SSS 255 macro
H A Dexynos5420.h168 #define CLK_SSS 471 macro
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5410.dtsi324 clocks = <&clock CLK_SSS>;
368 clocks = <&clock CLK_SSS>;
382 clocks = <&clock CLK_SSS>;
H A Dexynos5250.dtsi1173 clocks = <&clock CLK_SSS>;
1218 clocks = <&clock CLK_SSS>;
1223 clocks = <&clock CLK_SSS>;
H A Dexynos5420.dtsi1296 clocks = <&clock CLK_SSS>;
1341 clocks = <&clock CLK_SSS>;
1346 clocks = <&clock CLK_SSS>;
H A Dexynos4.dtsi997 clocks = <&clock CLK_SSS>;
1004 clocks = <&clock CLK_SSS>;
/linux/drivers/clk/samsung/
H A Dclk-exynos5410.c169 GATE(CLK_SSS, "sss", "aclk266", GATE_IP_G2D, 2, 0, 0),
H A Dclk-exynos5250.c448 GATE(CLK_SSS, "sss", "div_aclk266", GATE_IP_ACP, 2, 0, 0),
H A Dclk-exynos5420.c933 GATE(CLK_SSS, "sss", "aclk266_g2d", GATE_IP_G2D, 2, 0, 0),
H A Dclk-exynos4.c898 GATE(CLK_SSS, "sss", "aclk133", GATE_IP_DMC, 4, 0, 0),