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Searched refs:CLK_SDMMC2 (Results 1 – 11 of 11) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dexynos5250.h86 #define CLK_SDMMC2 282 macro
H A Dexynos4.h137 #define CLK_SDMMC2 299 macro
H A Dexynos3250.h229 #define CLK_SDMMC2 223 macro
H A Drk3568-cru.h258 #define CLK_SDMMC2 194 macro
/linux/drivers/clk/samsung/
H A Dclk-exynos5250.c566 GATE(CLK_SDMMC2, "sdmmc2", "div_aclk200", GATE_IP_FSYS, 14, 0, 0),
H A Dclk-exynos3250.c648 GATE(CLK_SDMMC2, "sdmmc2", "div_aclk_200", GATE_IP_FSYS, 7, 0, 0),
H A Dclk-exynos4.c847 GATE(CLK_SDMMC2, "sdmmc2", "aclk133", GATE_IP_FSYS, 7,
/linux/arch/arm/boot/dts/samsung/
H A Dexynos3250.dtsi579 clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>;
H A Dexynos4.dtsi340 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
H A Dexynos5250.dtsi579 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
/linux/drivers/clk/rockchip/
H A Dclk-rk3568.c960 COMPOSITE_NODIV(CLK_SDMMC2, "clk_sdmmc2", clk_sdmmc_p, 0,