| /linux/drivers/clk/renesas/ |
| H A D | r8a779f0-cpg-mssr.c | 37 CLK_PLL6, enumerator
65 DEF_GEN4_PLL_V9_24(".pll6", 6, CLK_PLL6, CLK_MAIN),
72 DEF_FIXED(".pll6_div2", CLK_PLL6_DIV2, CLK_PLL6, 2, 1),
|
| H A D | r9a08g045-cpg.c | 72 CLK_PLL6, enumerator
132 DEF_FIXED(".pll6", CLK_PLL6, CLK_EXTAL, 125, 6),
140 DEF_FIXED(".pll6_div2", CLK_PLL6_DIV2, CLK_PLL6, 1, 2),
183 DEF_FIXED("HP", R9A08G045_CLK_HP, CLK_PLL6, 1, 2),
|
| H A D | r8a779g0-cpg-mssr.c | 38 CLK_PLL6, enumerator
75 DEF_GEN4_PLL_V8_25(".pll6", 6, CLK_PLL6, CLK_MAIN),
83 DEF_FIXED(".pll6_div2", CLK_PLL6_DIV2, CLK_PLL6, 2, 1),
|
| H A D | r9a08g046-cpg.c | 129 CLK_PLL6, enumerator
254 DEF_G3L_PLL(".pll6", CLK_PLL6, CLK_EXTAL, CPG_PLL_CONF(0x50, 0),
265 DEF_FIXED(".pll6_div10", CLK_PLL6_DIV10, CLK_PLL6, 1, 10),
286 DEF_DIV(".div_eth0_tr", CLK_ETH0_TR, CLK_PLL6, G3L_SDIV_ETH_A, dtable_4_200),
287 DEF_DIV(".div_eth1_tr", CLK_ETH1_TR, CLK_PLL6, G3L_SDIV_ETH_C, dtable_4_200),
|
| H A D | r9a07g043-cpg.c | 58 CLK_PLL6, enumerator
129 DEF_FIXED(".pll6", CLK_PLL6, CLK_EXTAL, 125, 6),
130 DEF_FIXED(".pll6_250", CLK_PLL6_250, CLK_PLL6, 1, 2),
|
| H A D | r9a07g044-cpg.c | 59 CLK_PLL6, enumerator
172 DEF_FIXED(".pll6", CLK_PLL6, CLK_EXTAL, 125, 6),
193 DEF_FIXED(".pll6_250", CLK_PLL6_250, CLK_PLL6, 1, 2),
|
| /linux/include/dt-bindings/clock/ |
| H A D | spacemit,k3-clocks.h | 15 #define CLK_PLL6 5 macro
|
| /linux/drivers/clk/spacemit/ |
| H A D | ccu-k3.c | 1050 [CLK_PLL6] = &pll6.common.hw,
|