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Searched refs:CLK_PDMA0 (Results 1 – 16 of 16) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dexynos5410.h57 #define CLK_PDMA0 362 macro
H A Dexynos5250.h79 #define CLK_PDMA0 275 macro
H A Ds5pv210.h115 #define CLK_PDMA0 97 macro
H A Dexynos4.h130 #define CLK_PDMA0 292 macro
H A Dexynos5420.h122 #define CLK_PDMA0 362 macro
H A Dexynos3250.h207 #define CLK_PDMA0 201 macro
H A Dexynos5433.h562 #define CLK_PDMA0 65 macro
/linux/drivers/clk/samsung/
H A Dclk-exynos5250.c559 GATE(CLK_PDMA0, "pdma0", "div_aclk200", GATE_IP_FSYS, 1, 0, 0),
H A Dclk-exynos3250.c649 GATE(CLK_PDMA0, "pdma0", "div_aclk_200", GATE_IP_FSYS, 0, 0, 0),
H A Dclk-exynos5420.c1038 GATE(CLK_PDMA0, "pdma0", "aclk200_fsys", GATE_BUS_FSYS0, 1, 0, 0),
H A Dclk-exynos4.c838 GATE(CLK_PDMA0, "pdma0", "aclk133", GATE_IP_FSYS, 0,
H A Dclk-exynos5433.c2349 GATE(CLK_PDMA0, "pdma0", "aclk_pdma0", ENABLE_IP_FSYS0, 0, 0, 0),
/linux/arch/arm/boot/dts/samsung/
H A Ds5pv210.dtsi125 clocks = <&clocks CLK_PDMA0>;
H A Dexynos3250.dtsi601 clocks = <&cmu CLK_PDMA0>;
H A Dexynos4.dtsi678 clocks = <&clock CLK_PDMA0>;
H A Dexynos5420.dtsi555 clocks = <&clock CLK_PDMA0>;