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Searched refs:CLK_MM_MUTEX_32K (Results 1 – 11 of 11) sorted by relevance

/linux/Documentation/devicetree/bindings/media/
H A Dmediatek-mdp.txt37 <&mmsys CLK_MM_MUTEX_32K>;
47 <&mmsys CLK_MM_MUTEX_32K>;
/linux/drivers/clk/mediatek/
H A Dclk-mt6795-mm.c48 GATE_MM0(CLK_MM_MUTEX_32K, "mm_mutex_32k", "clk32k", 15),
H A Dclk-mt8173-mm.c51 GATE_MM0(CLK_MM_MUTEX_32K, "mm_mutex_32k", "rtc_sel", 15),
H A Dclk-mt2712-mm.c59 GATE_MM0(CLK_MM_MUTEX_32K, "mm_mutex_32k", "clk32k", 15),
/linux/include/dt-bindings/clock/
H A Dmediatek,mt6795-clk.h234 #define CLK_MM_MUTEX_32K 15 macro
H A Dmt8173-clk.h262 #define CLK_MM_MUTEX_32K 15 macro
H A Dmt2712-clk.h316 #define CLK_MM_MUTEX_32K 15 macro
H A Dmt2701-clk.h371 #define CLK_MM_MUTEX_32K 19 macro
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623n.dtsi204 clocks = <&mmsys CLK_MM_MUTEX_32K>;
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi1014 <&mmsys CLK_MM_MUTEX_32K>;
1024 <&mmsys CLK_MM_MUTEX_32K>;
1284 clocks = <&mmsys CLK_MM_MUTEX_32K>;
H A Dmt6795.dtsi931 clocks = <&mmsys CLK_MM_MUTEX_32K>;