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Searched refs:CLK_MM_MM_SMI_LARB0 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt8365-mm.c59 GATE_MM0(CLK_MM_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 23),
/linux/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h328 #define CLK_MM_MM_SMI_LARB0 23 macro
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8365.dtsi322 <&mmsys CLK_MM_MM_SMI_LARB0>;
752 clocks = <&mmsys CLK_MM_MM_SMI_LARB0>,
753 <&mmsys CLK_MM_MM_SMI_LARB0>;