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Searched refs:CLK_MM_MM_R2Y (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt6779-mm.c77 GATE_MM1(CLK_MM_MM_R2Y, "mm_mmsys_r2y", "mm_sel", 8),
/linux/include/dt-bindings/clock/
H A Dmt6779-clk.h380 #define CLK_MM_MM_R2Y 40 macro