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Searched refs:CLK_MM_MM_DISP_OVL0_2L (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt8365-mm.c44 GATE_MM0(CLK_MM_MM_DISP_OVL0_2L, "mm_disp_ovl0_2l", "mm_sel", 8),
/linux/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h313 #define CLK_MM_MM_DISP_OVL0_2L 8 macro