Searched refs:CLK_MM_DSI0_ENGINE (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt6795-mm.c | 71 GATE_MM1(CLK_MM_DSI0_ENGINE, "mm_dsi0_engine", "mm_sel", 4),
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| H A D | clk-mt8173-mm.c | 73 GATE_MM1(CLK_MM_DSI0_ENGINE, "mm_dsi0_engine", "mm_sel", 4),
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| H A D | clk-mt2712-mm.c | 79 GATE_MM1(CLK_MM_DSI0_ENGINE, "mm_dsi0_engine", "mm_sel", 4),
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| /linux/include/dt-bindings/clock/ |
| H A D | mediatek,mt6795-clk.h | 255 #define CLK_MM_DSI0_ENGINE 36 macro
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| H A D | mt8173-clk.h | 283 #define CLK_MM_DSI0_ENGINE 36 macro
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| H A D | mt2712-clk.h | 335 #define CLK_MM_DSI0_ENGINE 34 macro
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt6795.dtsi | 873 clocks = <&mmsys CLK_MM_DSI0_ENGINE>,
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| H A D | mt8173.dtsi | 1215 clocks = <&mmsys CLK_MM_DSI0_ENGINE>,
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