Searched refs:CLK_MM_DISP_PWM0_MM (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/clk/mediatek/ | ||
| H A D | clk-mt2712-mm.c | 75 GATE_MM1(CLK_MM_DISP_PWM0_MM, "mm_pwm0_mm", "mm_sel", 0), |
| /linux/include/dt-bindings/clock/ | ||
| H A D | mt2712-clk.h | 331 #define CLK_MM_DISP_PWM0_MM 30 macro |