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Searched refs:CLK_MM_DISP_PWM0MM (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt6795-mm.c67 GATE_MM1(CLK_MM_DISP_PWM0MM, "mm_disp_pwm0mm", "mm_sel", 0),
H A Dclk-mt8173-mm.c69 GATE_MM1(CLK_MM_DISP_PWM0MM, "mm_disp_pwm0mm", "mm_sel", 0),
/linux/include/dt-bindings/clock/
H A Dmediatek,mt6795-clk.h251 #define CLK_MM_DISP_PWM0MM 32 macro
H A Dmt8173-clk.h279 #define CLK_MM_DISP_PWM0MM 32 macro