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Searched refs:CLK_MFG_BG3D (Results 1 – 18 of 18) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt6735-mfgcfg.h6 #define CLK_MFG_BG3D 0 macro
H A Dmt8167-clk.h73 #define CLK_MFG_BG3D 2 macro
H A Dmediatek,mt6795-clk.h214 #define CLK_MFG_BG3D 2 macro
H A Dmediatek,mt8365-clk.h300 #define CLK_MFG_BG3D 0 macro
H A Dmt8183-clk.h292 #define CLK_MFG_BG3D 0 macro
H A Dmt2712-clk.h296 #define CLK_MFG_BG3D 0 macro
H A Dmt8186-clk.h296 #define CLK_MFG_BG3D 0 macro
H A Dmt8192-clk.h419 #define CLK_MFG_BG3D 0 macro
H A Dmt8195-clk.h428 #define CLK_MFG_BG3D 0 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8186-mfg.c24 GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "top_mfg", 0),
H A Dclk-mt8195-mfg.c25 GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_ck_fast_ref", 0),
H A Dclk-mt2712-mfg.c25 GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0),
H A Dclk-mt8192-mfg.c27 GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_pll_sel", 0),
H A Dclk-mt8183-mfgcfg.c26 GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0)
H A Dclk-mt6795-mfg.c25 GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 2),
H A Dclk-mt8167-mfgcfg.c30 GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_mm", 2),
H A Dclk-mt6735-mfgcfg.c26 GATE_MTK(CLK_MFG_BG3D, "bg3d", "mfg_sel", &mfgcfg_cg_regs, 0, &mtk_clk_gate_ops_setclr),
H A Dclk-mt8365-mfg.c35 GATE_MFG0(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0),