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Searched refs:CLK_LOW_FREQ (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/misc/cardreader/
H A Drts5228.c171 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ); in rts5228_sd_set_sample_push_timing_sd30()
174 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rts5228_sd_set_sample_push_timing_sd30()
649 CLK_LOW_FREQ, CLK_LOW_FREQ); in rts5228_pci_switch_clock()
674 err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rts5228_pci_switch_clock()
H A Drts5261.c148 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ); in rts5261_sd_set_sample_push_timing_sd30()
151 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rts5261_sd_set_sample_push_timing_sd30()
728 CLK_LOW_FREQ, CLK_LOW_FREQ); in rts5261_pci_switch_clock()
753 err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rts5261_pci_switch_clock()
H A Drts5260.c168 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ); in sd_set_sample_push_timing_sd30()
171 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_sample_push_timing_sd30()
H A Drts5264.c145 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ); in rts5264_sd_set_sample_push_timing_sd30()
148 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rts5264_sd_set_sample_push_timing_sd30()
H A Drtsx_pcr.c770 CLK_LOW_FREQ, CLK_LOW_FREQ); in rtsx_pci_switch_clock()
791 err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rtsx_pci_switch_clock()
/linux/drivers/mmc/host/
H A Drtsx_pci_sdmmc.c1028 CLK_LOW_FREQ, CLK_LOW_FREQ); in sd_set_timing()
1031 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1040 CLK_LOW_FREQ, CLK_LOW_FREQ); in sd_set_timing()
1043 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1056 CLK_LOW_FREQ, CLK_LOW_FREQ); in sd_set_timing()
1059 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1070 CLK_LOW_FREQ, CLK_LOW_FREQ); in sd_set_timing()
1073 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
/linux/include/linux/
H A Drtsx_pci.h452 #define CLK_LOW_FREQ 0x01 macro