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Searched refs:CLK_IFR_MSDC0_HCLK (Results 1 – 3 of 3) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h175 #define CLK_IFR_MSDC0_HCLK 22 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8365.c699 GATE_IFR3(CLK_IFR_MSDC0_HCLK, "ifr_msdc0", "msdc50_0_hc_sel", 2),
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8365.dtsi662 <&infracfg CLK_IFR_MSDC0_HCLK>,