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Searched refs:CLK_IFR_AP_MSDC0 (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt6765-clk.h218 #define CLK_IFR_AP_MSDC0 54 macro
H A Dmediatek,mt8365-clk.h194 #define CLK_IFR_AP_MSDC0 41 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8365.c720 GATE_IFR5(CLK_IFR_AP_MSDC0, "ifr_ap_msdc0", "msdc50_0_sel", 7),
H A Dclk-mt6765.c619 GATE_IFR5(CLK_IFR_AP_MSDC0, "ifr_ap_msdc0", "msdc50_0_ck", 7),