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Searched refs:CLK_ETHSYS_ESW (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt2701-eth.c25 GATE_ETH(CLK_ETHSYS_ESW, "esw_clk", "ethpll_500m_ck", 6),
/linux/include/dt-bindings/clock/
H A Dmt2701-clk.h417 #define CLK_ETHSYS_ESW 2 macro
/linux/arch/arm/boot/dts/mediatek/
H A Dmt2701.dtsi734 <&ethsys CLK_ETHSYS_ESW>,