Searched refs:CLK_DP0 (Results 1 – 3 of 3) sorted by relevance
490 #define CLK_DP0 475 macro
1823 GATE(CLK_DP0, "clk_dp0", "aclk_vo0_root", 0,
1583 <&cru CLK_DP0>, <&cru MCLK_I2S4_8CH_TX>,