Home
last modified time | relevance | path

Searched refs:CLK_DIVIDER_ROUND_CLOSEST (Results 1 – 25 of 26) sorted by relevance

12

/linux/drivers/clk/pistachio/
H A Dclk-pistachio.c61 0x20c, 8, CLK_DIVIDER_ROUND_CLOSEST),
63 0x210, 8, CLK_DIVIDER_ROUND_CLOSEST),
65 0x214, 8, CLK_DIVIDER_ROUND_CLOSEST),
67 0x218, 8, CLK_DIVIDER_ROUND_CLOSEST),
75 0x234, 3, CLK_DIVIDER_ROUND_CLOSEST),
77 CLK_DIVIDER_ROUND_CLOSEST),
79 0x23c, 3, CLK_DIVIDER_ROUND_CLOSEST),
81 CLK_DIVIDER_ROUND_CLOSEST),
232 CLK_DIVIDER_ROUND_CLOSEST),
234 CLK_DIVIDER_ROUND_CLOSEST),
[all …]
/linux/drivers/clk/mediatek/
H A Dclk-mt8365.c553 0x324, 0, 8, CLK_DIVIDER_ROUND_CLOSEST),
555 0x324, 8, 8, CLK_DIVIDER_ROUND_CLOSEST),
557 0x324, 16, 8, CLK_DIVIDER_ROUND_CLOSEST),
559 0x324, 24, 8, CLK_DIVIDER_ROUND_CLOSEST),
561 0x328, 0, 8, CLK_DIVIDER_ROUND_CLOSEST),
563 0x328, 8, 8, CLK_DIVIDER_ROUND_CLOSEST),
565 0x328, 16, 8, CLK_DIVIDER_ROUND_CLOSEST),
567 0x328, 24, 8, CLK_DIVIDER_ROUND_CLOSEST),
569 0x32c, 0, 8, CLK_DIVIDER_ROUND_CLOSEST),
/linux/drivers/clk/hisilicon/
H A Dclkdivider-hi6220.c55 CLK_DIVIDER_ROUND_CLOSEST, dclk->width); in hi6220_clkdiv_recalc_rate()
64 CLK_DIVIDER_ROUND_CLOSEST); in hi6220_clkdiv_determine_rate()
76 dclk->width, CLK_DIVIDER_ROUND_CLOSEST); in hi6220_clkdiv_set_rate()
/linux/drivers/clk/actions/
H A Dowl-s500.c334 OWL_DIVIDER_HW(CMU_UART0CLK, 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL),
340 OWL_DIVIDER_HW(CMU_UART1CLK, 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL),
346 OWL_DIVIDER_HW(CMU_UART2CLK, 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL),
352 OWL_DIVIDER_HW(CMU_UART3CLK, 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL),
358 OWL_DIVIDER_HW(CMU_UART4CLK, 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL),
364 OWL_DIVIDER_HW(CMU_UART5CLK, 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL),
370 OWL_DIVIDER_HW(CMU_UART6CLK, 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL),
H A Dowl-s700.c285 OWL_DIVIDER_HW(CMU_UART0CLK, 0, 9, CLK_DIVIDER_ROUND_CLOSEST, NULL),
291 OWL_DIVIDER_HW(CMU_UART1CLK, 0, 9, CLK_DIVIDER_ROUND_CLOSEST, NULL),
297 OWL_DIVIDER_HW(CMU_UART2CLK, 0, 9, CLK_DIVIDER_ROUND_CLOSEST, NULL),
303 OWL_DIVIDER_HW(CMU_UART3CLK, 0, 9, CLK_DIVIDER_ROUND_CLOSEST, NULL),
309 OWL_DIVIDER_HW(CMU_UART4CLK, 0, 9, CLK_DIVIDER_ROUND_CLOSEST, NULL),
315 OWL_DIVIDER_HW(CMU_UART5CLK, 0, 9, CLK_DIVIDER_ROUND_CLOSEST, NULL),
321 OWL_DIVIDER_HW(CMU_UART6CLK, 0, 9, CLK_DIVIDER_ROUND_CLOSEST, NULL),
H A Dowl-s900.c451 OWL_DIVIDER_HW(CMU_UART0CLK, 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL),
457 OWL_DIVIDER_HW(CMU_UART1CLK, 1, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL),
463 OWL_DIVIDER_HW(CMU_UART2CLK, 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL),
469 OWL_DIVIDER_HW(CMU_UART3CLK, 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL),
475 OWL_DIVIDER_HW(CMU_UART4CLK, 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL),
481 OWL_DIVIDER_HW(CMU_UART5CLK, 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL),
487 OWL_DIVIDER_HW(CMU_UART6CLK, 0, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL),
/linux/drivers/clk/mmp/
H A Dclk-audio.c273 priv->sysclk_div.flags |= CLK_DIVIDER_ROUND_CLOSEST; in register_clocks()
294 priv->sspa0_div.flags |= CLK_DIVIDER_ROUND_CLOSEST; in register_clocks()
325 priv->sspa1_div.flags |= CLK_DIVIDER_ROUND_CLOSEST; in register_clocks()
/linux/drivers/clk/rockchip/
H A Dclk-half-divider.c16 if (flags & CLK_DIVIDER_ROUND_CLOSEST) in _is_best_half_div()
/linux/drivers/clk/meson/
H A Ds4-pll.c340 CLK_DIVIDER_ROUND_CLOSEST),
418 CLK_DIVIDER_ROUND_CLOSEST),
H A Dgxbb.c1273 .flags = CLK_DIVIDER_ROUND_CLOSEST,
1323 .flags = CLK_DIVIDER_ROUND_CLOSEST,
1469 .flags = CLK_DIVIDER_ROUND_CLOSEST,
1519 .flags = CLK_DIVIDER_ROUND_CLOSEST,
1569 .flags = CLK_DIVIDER_ROUND_CLOSEST,
2586 .flags = CLK_DIVIDER_ROUND_CLOSEST,
2636 .flags = CLK_DIVIDER_ROUND_CLOSEST,
H A Dmeson8b.c884 .flags = CLK_DIVIDER_ROUND_CLOSEST,
2323 .flags = CLK_DIVIDER_ROUND_CLOSEST,
2357 .flags = CLK_DIVIDER_ROUND_CLOSEST,
2426 .flags = CLK_DIVIDER_ROUND_CLOSEST,
2476 .flags = CLK_DIVIDER_ROUND_CLOSEST,
2526 .flags = CLK_DIVIDER_ROUND_CLOSEST,
2603 .flags = CLK_DIVIDER_ROUND_CLOSEST,
2653 .flags = CLK_DIVIDER_ROUND_CLOSEST,
H A Daxg.c1032 .flags = CLK_DIVIDER_ROUND_CLOSEST,
1082 .flags = CLK_DIVIDER_ROUND_CLOSEST,
/linux/drivers/clk/imx/
H A Dclk-composite-93.c215 div->flags = CLK_DIVIDER_ROUND_CLOSEST; in imx93_clk_composite_flags()
H A Dclk-composite-8m.c270 div->flags = CLK_DIVIDER_ROUND_CLOSEST; in __imx8m_clk_hw_composite()
H A Dclk.h362 reg, shift, width, CLK_DIVIDER_ROUND_CLOSEST, &imx_ccm_lock); in imx_clk_hw_divider_closest()
/linux/drivers/clk/zynqmp/
H A Ddivider.c256 ccf_flag |= CLK_DIVIDER_ROUND_CLOSEST; in zynqmp_clk_map_divider_ccf_flags()
/linux/drivers/clk/
H A Dclk-divider.c268 if (flags & CLK_DIVIDER_ROUND_CLOSEST) in _div_round()
277 if (flags & CLK_DIVIDER_ROUND_CLOSEST) in _is_best_div()
/linux/drivers/clk/sophgo/
H A Dclk-cv18xx-ip.h91 (CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ROUND_CLOSEST)
H A Dclk-cv1800.c34 (CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ROUND_CLOSEST)
/linux/drivers/clk/sunxi-ng/
H A Dccu_div.h154 .div = _SUNXI_CCU_DIV_FLAGS(_mshift, _mwidth, CLK_DIVIDER_ROUND_CLOSEST), \
/linux/arch/arm64/boot/dts/freescale/
H A Dimx93-tqma9352.dtsi62 * clk framework uses CLK_DIVIDER_ROUND_CLOSEST
/linux/drivers/clk/xilinx/
H A Dxlnx_vcu.c447 CLK_DIVIDER_ROUND_CLOSEST; in xvcu_clk_hw_register_leaf()
/linux/drivers/clk/renesas/
H A Drzg2l-cpg.c337 CLK_DIVIDER_ROUND_CLOSEST, div_hw_data->width); in rzg3s_div_clk_recalc_rate()
349 CLK_DIVIDER_ROUND_CLOSEST); in rzg3s_div_clk_determine_rate()
365 CLK_DIVIDER_ROUND_CLOSEST); in rzg3s_div_clk_set_rate()
/linux/include/linux/
H A Dclk-provider.h765 #define CLK_DIVIDER_ROUND_CLOSEST BIT(4) macro
/linux/drivers/mtd/nand/raw/
H A Dmeson_nand.c1163 CLK_DIVIDER_ROUND_CLOSEST | in meson_nfc_clk_init()

12