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Searched refs:CLASS2_MAILBOX_THRESHOLD_INTR (Results 1 – 3 of 3) sorted by relevance

/linux/arch/powerpc/platforms/cell/spufs/
H A Dhw_ops.c73 CLASS2_MAILBOX_THRESHOLD_INTR); in spu_hw_mbox_stat_poll()
H A Dbacking_ops.c106 ~CLASS2_MAILBOX_THRESHOLD_INTR; in spu_backing_mbox_stat_poll()
/linux/arch/powerpc/include/asm/
H A Dspu.h496 #define CLASS2_MAILBOX_THRESHOLD_INTR 0x10L macro