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Searched refs:CKSEG1ADDR (Results 1 – 25 of 36) sorted by relevance

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/linux/arch/mips/include/asm/
H A Dsni.h40 #define SNI_PORT_BASE CKSEG1ADDR(0xb4000000)
46 #define PCIMT_UCONF CKSEG1ADDR(0xbfff0004)
47 #define PCIMT_IOADTIMEOUT2 CKSEG1ADDR(0xbfff000c)
48 #define PCIMT_IOMEMCONF CKSEG1ADDR(0xbfff0014)
49 #define PCIMT_IOMMU CKSEG1ADDR(0xbfff001c)
50 #define PCIMT_IOADTIMEOUT1 CKSEG1ADDR(0xbfff0024)
51 #define PCIMT_DMAACCESS CKSEG1ADDR(0xbfff002c)
52 #define PCIMT_DMAHIT CKSEG1ADDR(0xbfff0034)
53 #define PCIMT_ERRSTATUS CKSEG1ADDR(0xbfff003c)
54 #define PCIMT_ERRADDR CKSEG1ADDR(0xbfff0044)
[all …]
H A Daddrspace.h79 #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) macro
86 #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) macro
H A Dbarrier.h56 : "m" (*(int *)CKSEG1ADDR(0x1fa00004)) \
/linux/arch/mips/dec/prom/
H A Didentify.c74 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN01_RTC); in prom_init_kn01()
82 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN01_RTC); in prom_init_kn230()
91 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN02_RTC); in prom_init_kn02()
100 ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL); in prom_init_kn02xa()
101 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY); in prom_init_kn02xa()
110 ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL); in prom_init_kn03()
111 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY); in prom_init_kn03()
/linux/arch/mips/boot/compressed/
H A Duart-16550.c15 #define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset))
20 #define PORT(offset) (CKSEG1ADDR(INGENIC_UART_BASE_ADDR) + (4 * offset))
25 #define PORT(offset) (CKSEG1ADDR(EN75_UART_BASE) + (4 * (offset)))
/linux/arch/mips/dec/
H A Dkn02-irq.c30 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + in unmask_kn02_irq()
39 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + in mask_kn02_irq()
62 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + in init_kn02_irqs()
H A Dint-handler.S30 #define KN02_CSR_BASE CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR)
31 #define KN02XA_IOASIC_BASE CKSEG1ADDR(KN02XA_SLOT_BASE + IOASIC_IOCTL)
32 #define KN03_IOASIC_BASE CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_IOCTL)
H A Dreset.c17 noret_func_t func = (void *)CKSEG1ADDR(0x1fc00000); in back_to_prom()
/linux/arch/mips/econet/
H A Dinit.c20 #define CR_AHB_RSTCR ((void __iomem *)CKSEG1ADDR(0x1fb00040))
23 #define UART_BASE CKSEG1ADDR(0x1fbf0003)
/linux/arch/mips/lib/
H A Duncached.c48 usp = CKSEG1ADDR(sp); in run_uncached()
60 ufunc = CKSEG1ADDR(lfunc); in run_uncached()
/linux/arch/mips/cobalt/
H A Dsetup.c81 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE)); in plat_mem_setup()
115 setup_8250_early_printk_port(CKSEG1ADDR(0x1c800000), 0, 0); in prom_init()
H A Dreset.c20 #define RESET_PORT ((void __iomem *)CKSEG1ADDR(0x1c000000))
H A Dpci.c38 .io_map_base = CKSEG1ADDR(GT_DEF_PCI0_IO_BASE),
/linux/drivers/mtd/devices/
H A Dms02-nv.c88 ms02nv_diagp = (ms02nv_uint *)(CKSEG1ADDR(addr + MS02NV_DIAG)); in ms02nv_probe_one()
89 ms02nv_magicp = (ms02nv_uint *)(CKSEG1ADDR(addr + MS02NV_MAGIC)); in ms02nv_probe_one()
277 csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); in ms02nv_init()
283 csr = (volatile u32 *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR); in ms02nv_init()
/linux/arch/mips/sgi-ip22/
H A Dip22-gio.c275 ptr32 = (void *)CKSEG1ADDR(addr); in ip22_gio_id()
285 ptr8 = (void *)CKSEG1ADDR(addr + 3); in ip22_gio_id()
296 ptr16 = (void *)CKSEG1ADDR(addr + 2); in ip22_gio_id()
317 ptr = (void *)CKSEG1ADDR(addr + HQ2_MYSTERY_OFFS); in ip22_is_gr2()
/linux/arch/mips/fw/sni/
H A Dsniprom.c35 #define PROM_VEC (u64 *)CKSEG1ADDR(0x1fc00000)
87 return (void *)CKSEG1ADDR(hwconf); in prom_get_hwconf()
/linux/arch/mips/generic/
H A Dboard-sead3.c19 #define SEAD_CONFIG CKSEG1ADDR(0x1b100110)
22 #define MIPS_REVISION CKSEG1ADDR(0x1fc00010)
/linux/arch/mips/include/asm/mach-cobalt/
H A Dmach-gt64120.h12 #define GT64120_BASE CKSEG1ADDR(GT_DEF_BASE)
/linux/arch/mips/loongson64/
H A Dsmp.c767 (void *)CKSEG1ADDR((unsigned long)loongson3_type3_play_dead); in play_dead()
775 (void *)CKSEG1ADDR((unsigned long)loongson3_type1_play_dead); in play_dead()
780 (void *)CKSEG1ADDR((unsigned long)loongson3_type2_play_dead); in play_dead()
787 (void *)CKSEG1ADDR((unsigned long)loongson3_type3_play_dead); in play_dead()
/linux/arch/mips/include/asm/mach-generic/
H A Dspaces.h53 #define CKSEG1ADDR_OR_64BIT(x) CKSEG1ADDR(x)
/linux/arch/mips/bcm47xx/
H A Dprom.c117 setup_8250_early_printk_port(CKSEG1ADDR(BCM47XX_SERIAL_ADDR), 0, 0); in prom_init()
/linux/arch/mips/sni/
H A Drm200.c415 #define SNI_RM200_INT_STAT_REG CKSEG1ADDR(0xbc000000)
416 #define SNI_RM200_INT_ENA_REG CKSEG1ADDR(0xbc080000)
/linux/arch/mips/pci/
H A Dops-bonito64.c19 #define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(_pcictrl_bonito_pcicfg + (offset))
H A Dpci-ip32.c121 .io_map_base = CKSEG1ADDR(MACEPCI_LOW_IO),
/linux/arch/mips/bmips/
H A Dsetup.c34 #define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c))

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