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Searched refs:CHV_CMN_DW1_CH1 (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dintel_dpio_phy.c895 val = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW1_CH1); in chv_phy_pre_pll_enable()
901 vlv_dpio_write(dev_priv, phy, CHV_CMN_DW1_CH1, val); in chv_phy_pre_pll_enable()
1043 val = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW1_CH1); in chv_phy_post_pll_disable()
1045 vlv_dpio_write(dev_priv, phy, CHV_CMN_DW1_CH1, val); in chv_phy_post_pll_disable()
H A Dvlv_dpio_phy_regs.h256 #define CHV_CMN_DW1_CH1 _CHV_CMN(1, 1) macro
267 #define CHV_CMN_DW14(ch) _PIPE(ch, CHV_CMN_DW14_CH0, CHV_CMN_DW1_CH1)