Searched refs:CHL_INT1_MSK (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/scsi/hisi_sas/ |
| H A D | hisi_sas_v1_hw.c | 181 #define CHL_INT1_MSK (PORT_BASE + 0x1c0) macro
1700 hisi_sas_phy_write32(hisi_hba, i, CHL_INT1_MSK, 0x17fff); in interrupt_openall_v1_hw()
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| H A D | hisi_sas_v3_hw.c | 284 #define CHL_INT1_MSK (PORT_BASE + 0x1c4) macro
668 hisi_sas_phy_write32(hisi_hba, i, CHL_INT1_MSK, 0xf2057fff); in interrupt_enable_v3_hw()
1829 u32 irq_msk = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT1_MSK); in handle_chl_int1_v3_hw()
2734 hisi_sas_phy_write32(hisi_hba, i, CHL_INT1_MSK, 0xffffffff); in interrupt_disable_v3_hw()
3048 HISI_SAS_DEBUGFS_REG(CHL_INT1_MSK),
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