Searched refs:CFG_ADDR (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/watchdog/ |
| H A D | ebc-c384_wdt.c | 27 #define CFG_ADDR (BASE_ADDR + 1) macro
68 outb(0x00, CFG_ADDR); in ebc_c384_wdt_set_timeout()
73 outb(0x80, CFG_ADDR); in ebc_c384_wdt_set_timeout()
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| /linux/drivers/net/ethernet/i825xx/ |
| H A D | ether1.c | 369 #define CFG_ADDR (0x0010) macro
392 CFG_ADDR,
459 ether1_writebuffer (dev, &init_cfg, CFG_ADDR, CFG_SIZE); in ether1_init_for_open()
465 if (ether1_readw(dev, CFG_ADDR, cfg_t, cfg_command, NORMALIRQS) != CMD_CONFIG) { in ether1_init_for_open()
524 while (((status = ether1_readw(dev, CFG_ADDR, cfg_t, cfg_status, DISABLEIRQS)) in ether1_init_for_open()
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| /linux/drivers/media/platform/mediatek/mdp3/ |
| H A D | mtk-img-ipi.h | 129 #define CFG_ADDR(plat, cfg, mem) \ macro
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| H A D | mtk-mdp3-cmdq.c | 287 param = (void *)CFG_ADDR(MT8183, path->config, components[index]); in mdp_path_ctx_init()
289 param = (void *)CFG_ADDR(MT8195, path->config, components[index]); in mdp_path_ctx_init()
317 ctrl = CFG_ADDR(MT8183, path->config, ctrls[count]); in mdp_path_config_subfrm()
319 ctrl = CFG_ADDR(MT8195, path->config, ctrls[count]); in mdp_path_config_subfrm()
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