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Searched refs:BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h1737 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK 0x0000ffffL macro
H A Ddce_8_0_sh_mask.h3233 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK 0xffff macro
H A Ddce_11_0_sh_mask.h3225 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK 0xffff macro
H A Ddce_10_0_sh_mask.h3155 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK 0xffff macro
H A Ddce_11_2_sh_mask.h3473 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK 0xffff macro
H A Ddce_12_0_sh_mask.h9309 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h21329 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK … macro
H A Ddcn_1_0_sh_mask.h40060 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK … macro
H A Ddcn_3_2_1_sh_mask.h41927 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK … macro
H A Ddcn_2_1_0_sh_mask.h43294 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK … macro
H A Ddcn_3_0_2_sh_mask.h42616 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK … macro
H A Ddcn_2_0_0_sh_mask.h48803 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK … macro
H A Ddcn_3_0_0_sh_mask.h49231 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK … macro
H A Ddcn_4_1_0_sh_mask.h41938 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK … macro
H A Ddcn_3_2_0_sh_mask.h41906 #define BL_PWM_CNTL__BL_ACTIVE_INT_FRAC_CNT_MASK … macro