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Searched refs:BLC_PWM_CTL (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/gma500/
H A Dpsb_intel_lvds.c68 ret = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_get_max_backlight()
80 REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL); in psb_intel_lvds_get_max_backlight()
148 REG_WRITE(BLC_PWM_CTL, in psb_lvds_pwm_set_brightness()
190 blc_pwm_ctl = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_set_backlight()
192 REG_WRITE(BLC_PWM_CTL, in psb_intel_lvds_set_backlight()
268 lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_save()
309 REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL); in psb_intel_lvds_restore()
434 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_prepare()
H A Doaktrail_device.c53 max_pwm_blc = REG_READ(BLC_PWM_CTL) >> 16; in oaktrail_set_brightness()
70 REG_WRITE(BLC_PWM_CTL, (max_pwm_blc << 16) | blc_pwm_ctl); in oaktrail_set_brightness()
101 REG_WRITE(BLC_PWM_CTL, value | (value << 16)); in oaktrail_backlight_init()
178 regs->saveBLC_PWM_CTL = PSB_RVDC32(BLC_PWM_CTL); in oaktrail_save_display_registers()
308 PSB_WVDC32(regs->saveBLC_PWM_CTL, BLC_PWM_CTL); in oaktrail_restore_display_registers()
H A Dcdv_intel_lvds.c67 retval = ((REG_READ(BLC_PWM_CTL) & in cdv_intel_lvds_get_max_backlight()
92 REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; in cdv_intel_lvds_set_backlight()
93 REG_WRITE(BLC_PWM_CTL, in cdv_intel_lvds_set_backlight()
239 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in cdv_intel_lvds_prepare()
H A Doaktrail_lvds.c166 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in oaktrail_lvds_prepare()
179 ret = ((REG_READ(BLC_PWM_CTL) & in oaktrail_lvds_get_max_backlight()
H A Dpsb_device.c71 REG_WRITE(BLC_PWM_CTL, in psb_backlight_setup()
H A Dpsb_intel_reg.h80 #define BLC_PWM_CTL 0x61254 macro
/linux/drivers/gpu/drm/i915/display/
H A Dintel_backlight_regs.h47 #define BLC_PWM_CTL _MMIO(0x61254) macro