Searched refs:BIT_2 (Results 1 – 16 of 16) sorted by relevance
19 #define BIT_2 0x4 macro130 #define ISP_CFG1_BENAB BIT_2 /* Global Bus burst enable */135 #define ISP_EN_RISC BIT_2 /* ISP enable RISC interrupts. */140 #define RISC_INT BIT_2 /* RISC interrupt */147 #define NV_DATA_OUT BIT_2157 #define CDMA_CONF_RIRQ BIT_2 /* RISC interrupt enable */174 #define DDMA_CONF_RIRQ BIT_2 /* RISC interrupt enable */324 #define NV_START_BIT BIT_2568 #define RF_BAD_HEADER BIT_2 /* Bad header. */
1348 arg1 &= ~(BIT_2 | BIT_3); in qlcnic_config_switch_port()1354 arg2 |= (BIT_2 | BIT_3); in qlcnic_config_switch_port()1364 arg2 &= ~(BIT_1 | BIT_2 | BIT_3); in qlcnic_config_switch_port()1366 arg2 &= ~BIT_2; in qlcnic_config_switch_port()1367 if (!(esw_cfg->offload_flags & BIT_2)) in qlcnic_config_switch_port()1372 arg1 |= (BIT_2 | BIT_5); in qlcnic_config_switch_port()
197 #define BIT_2 0x4 macro494 #define TA_CTL_WRITE BIT_2
748 val = BIT_2 | ((adapter->ahw->num_msix - 1) << 8); in qlcnic_83xx_enable_mbx_interrupt()750 val = BIT_2; in qlcnic_83xx_enable_mbx_interrupt()2022 lro_bit_mask = (mode ? (BIT_0 | BIT_1 | BIT_2 | BIT_3) : 0); in qlcnic_83xx_config_hw_lro()3549 cmd.req.arg[1] = BIT_2 | (adapter->portnum << 16); in qlcnic_83xx_get_stats()
551 if (mbx_out & BIT_2) in qlcnic_83xx_dcb_get_hw_capability()
1038 if (!(offload_flags & BIT_2)) in qlcnic_process_flags()
25 #define QLCNIC_DUMP_ANDCRB BIT_2
383 if (status & BIT_2) in qlcnic_sriov_get_vf_vport_info()
1023 #define QLC_83XX_MATCH_ENCAP_ID BIT_2
365 #define QLCNIC_ENCAP_INNER_L3_IP6 BIT_2
1495 esw_cfg.offload_flags |= (BIT_1 | BIT_2); in qlcnic_set_default_offload_settings()
483 #define CTIO7_FLAGS_DSD_PTR BIT_2854 TRC_DO_WORK_ERR = BIT_2,1002 #define QLA24XX_MGMT_LLD_OWNED BIT_2
1195 mb[1] = BIT_2 | BIT_3; in qla24xx_async_gnl()4426 (ha->fw_attributes & BIT_2)) { in qla2x00_setup_chip()4592 if (ha->fw_seriallink_options[3] & BIT_2) { in qla2x00_update_fw_options()4596 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); in qla2x00_update_fw_options()4600 (BIT_3 | BIT_2 | BIT_1 | BIT_0); in qla2x00_update_fw_options()4618 (BIT_3 | BIT_2 | BIT_1 | BIT_0); in qla2x00_update_fw_options()5391 nv->firmware_options[0] = BIT_2 | BIT_1; in qla2x00_nvram_config()5398 nv->firmware_options[0] = BIT_2 | BIT_1; in qla2x00_nvram_config()5425 nv->host_p[1] = BIT_2; in qla2x00_nvram_config()5446 nv->firmware_options[0] |= BIT_2; in qla2x00_nvram_config()[all …]
6358 if (sfp[0] & BIT_2 || sfp[1] & (BIT_6|BIT_5)) in qla24xx_process_purex_rdp()
82 #define BIT_2 0x4 macro
3561 conn->tcp_timer_scale |= BIT_2; in qla4xxx_copy_from_fwddb_param()3688 SET_BITVAL(conn->tcp_timer_scale & BIT_2, options, BIT_3); in qla4xxx_copy_to_fwddb_param()3689 SET_BITVAL(conn->tcp_timer_scale & BIT_1, options, BIT_2); in qla4xxx_copy_to_fwddb_param()3797 conn->tcp_timer_scale |= BIT_2; in qla4xxx_copy_to_sess_conn_params()