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Searched refs:BIT14 (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/staging/rtl8723bs/include/
H A Drtl8723b_spec.h202 #define IMR_BCNDMAINT_E_8723B BIT14 /* Beacon DMA Interrupt Extension for Win7 */
230 #define IMR_BCNDOK1_8723B BIT14 /* Beacon Queue DMA OK Interrupt 1 */
H A Dhal_com_reg.h281 #define RCR_HTC_LOC_CTRL BIT14 /* MFC<--HTC = 1 MFC-->HTC = 0 */
/linux/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h45 #define BIT14 0x00004000 macro
/linux/include/uapi/linux/
H A Dsynclink.h33 #define BIT14 0x4000 macro
/linux/drivers/scsi/
H A Ddc395x.h62 #define BIT14 0x00004000 macro
/linux/drivers/tty/
H A Dsynclink_gt.c353 #define MASK_BREAK BIT14
380 #define RXIDLE BIT14
381 #define RXBREAK BIT14
3886 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) & ~BIT14)); in rx_start()
3894 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT14)); in rx_start()
4121 val = BIT15 + BIT14 + BIT0; in async_mode()
4175 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4250 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4357 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0); in sync_mode()
/linux/drivers/staging/rtl8723bs/hal/
H A Dodm_DIG.c665 PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1); in odm_FalseAlarmCounterStatistics()