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Searched refs:BIT (Results 1 – 25 of 3103) sorted by relevance

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/linux/drivers/platform/x86/intel/pmc/
H A Dmtl.c30 {"PMC", BIT(0)},
31 {"OPI", BIT(1)},
32 {"SPI", BIT(2)},
33 {"XHCI", BIT(3)},
34 {"SPA", BIT(4)},
35 {"SPB", BIT(5)},
36 {"SPC", BIT(6)},
37 {"GBE", BIT(7)},
39 {"SATA", BIT(0)},
40 {"DSP0", BIT(1)},
[all …]
H A Dlnl.c63 {"PMC_PGD0_PG_STS", BIT(0), 0},
64 {"FUSE_OSSE_PGD0_PG_STS", BIT(1), 0},
65 {"ESPISPI_PGD0_PG_STS", BIT(2), 0},
66 {"XHCI_PGD0_PG_STS", BIT(3), 1},
67 {"SPA_PGD0_PG_STS", BIT(4), 1},
68 {"SPB_PGD0_PG_STS", BIT(5), 1},
69 {"SPR16B0_PGD0_PG_STS", BIT(6), 0},
70 {"GBE_PGD0_PG_STS", BIT(7), 1},
71 {"SBR8B7_PGD0_PG_STS", BIT(8), 0},
72 {"SBR8B6_PGD0_PG_STS", BIT(9), 0},
[all …]
H A Dptl.c25 {"PMC_0", BIT(0)},
26 {"FUSE_OSSE", BIT(1)},
27 {"ESPISPI", BIT(2)},
28 {"XHCI", BIT(3)},
29 {"SPA", BIT(4)},
30 {"SPB", BIT(5)},
31 {"MPFPW2", BIT(6)},
32 {"GBE", BIT(7)},
34 {"SBR16B20", BIT(0)},
35 {"SBR8B20", BIT(1)},
[all …]
H A Dwcl.c18 {"PMC_0", BIT(0)},
19 {"FUSE_OSSE", BIT(1)},
20 {"ESPISPI", BIT(2)},
21 {"XHCI", BIT(3)},
22 {"SPA", BIT(4)},
23 {"RSVD", BIT(5)},
24 {"MPFPW2", BIT(6)},
25 {"GBE", BIT(7)},
27 {"SBR16B21", BIT(0)},
28 {"SBR16B5", BIT(1)},
[all …]
H A Darl.c63 {"AON2_OFF_STS", BIT(0)},
64 {"AON3_OFF_STS", BIT(1)},
65 {"AON4_OFF_STS", BIT(2)},
66 {"AON5_OFF_STS", BIT(3)},
67 {"AON1_OFF_STS", BIT(4)},
68 {"XTAL_LVM_OFF_STS", BIT(5)},
69 {"AON3_SPL_OFF_STS", BIT(9)},
70 {"DMI3FPW_0_PLL_OFF_STS", BIT(10)},
71 {"DMI3FPW_1_PLL_OFF_STS", BIT(11)},
72 {"G5X16FPW_0_PLL_OFF_STS", BIT(14)},
[all …]
/linux/drivers/crypto/intel/qat/qat_common/
H A Dadf_gen4_ras.h11 #define ADF_GEN4_ERRSOU0_BIT BIT(0)
18 #define ADF_GEN4_ERRSOU1_HIAEUNCERRLOG_CPP0_BIT BIT(0)
19 #define ADF_GEN4_ERRSOU1_HICPPAGENTCMDPARERRLOG_BIT BIT(1)
20 #define ADF_GEN4_ERRSOU1_RIMEM_PARERR_STS_BIT BIT(2)
21 #define ADF_GEN4_ERRSOU1_TIMEM_PARERR_STS_BIT BIT(3)
22 #define ADF_GEN4_ERRSOU1_RIMISCSTS_BIT BIT(4)
72 (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(5) | \
73 BIT(7) | BIT(10) | BIT(11) | BIT(12) | BIT(13) | \
74 BIT(14) | BIT(15) | BIT(16) | BIT(17) | BIT(18) | BIT(19) | \
75 BIT(20) | BIT(21) | BIT(22) | BIT(23) | BIT(24) | BIT(25) | \
[all …]
/linux/drivers/clk/stm32/
H A Dstm32mp13_rcc.h238 #define RCC_MP_SREQSETR_STPREQ_P0 BIT(0)
241 #define RCC_MP_SREQCLRR_STPREQ_P0 BIT(0)
244 #define RCC_MP_APRSTCR_RDCTLEN BIT(0)
257 #define RCC_MP_GRSTCSETR_MPSYSRST BIT(0)
258 #define RCC_MP_GRSTCSETR_MPUP0RST BIT(4)
261 #define RCC_BR_RSTSCLRR_PORRSTF BIT(0)
262 #define RCC_BR_RSTSCLRR_BORRSTF BIT(1)
263 #define RCC_BR_RSTSCLRR_PADRSTF BIT(2)
264 #define RCC_BR_RSTSCLRR_HCSSRSTF BIT(3)
265 #define RCC_BR_RSTSCLRR_VCORERSTF BIT(4)
[all …]
/linux/drivers/gpu/drm/bridge/
H A Dsil-sii8620.h35 #define BIT_SYS_CTRL1_OTPVMUTEOVR_SET BIT(7)
36 #define BIT_SYS_CTRL1_VSYNCPIN BIT(6)
37 #define BIT_SYS_CTRL1_OTPADROPOVR_SET BIT(5)
38 #define BIT_SYS_CTRL1_BLOCK_DDC_BY_HPD BIT(4)
39 #define BIT_SYS_CTRL1_OTP2XVOVR_EN BIT(3)
40 #define BIT_SYS_CTRL1_OTP2XAOVR_EN BIT(2)
41 #define BIT_SYS_CTRL1_TX_CTRL_HDMI BIT(1)
42 #define BIT_SYS_CTRL1_OTPAMUTEOVR_SET BIT(0)
46 #define BIT_DPD_PWRON_PLL BIT(7)
47 #define BIT_DPD_PDNTX12 BIT(6)
[all …]
/linux/drivers/net/ethernet/freescale/dpaa2/
H A Ddpkg.h64 #define NH_FLD_ETH_DA BIT(0)
65 #define NH_FLD_ETH_SA BIT(1)
66 #define NH_FLD_ETH_LENGTH BIT(2)
67 #define NH_FLD_ETH_TYPE BIT(3)
68 #define NH_FLD_ETH_FINAL_CKSUM BIT(4)
69 #define NH_FLD_ETH_PADDING BIT(5)
70 #define NH_FLD_ETH_ALL_FIELDS (BIT(6) - 1)
73 #define NH_FLD_VLAN_VPRI BIT(0)
74 #define NH_FLD_VLAN_CFI BIT(1)
75 #define NH_FLD_VLAN_VID BIT(2)
[all …]
/linux/arch/mips/include/asm/mach-ath79/
H A Dar71xx_regs.h171 #define QCA956X_MAC_CFG1_SOFT_RST BIT(31)
172 #define QCA956X_MAC_CFG1_RX_RST BIT(19)
173 #define QCA956X_MAC_CFG1_TX_RST BIT(18)
174 #define QCA956X_MAC_CFG1_LOOPBACK BIT(8)
175 #define QCA956X_MAC_CFG1_RX_EN BIT(2)
176 #define QCA956X_MAC_CFG1_TX_EN BIT(0)
179 #define QCA956X_MAC_CFG2_IF_1000 BIT(9)
180 #define QCA956X_MAC_CFG2_IF_10_100 BIT(8)
181 #define QCA956X_MAC_CFG2_HUGE_FRAME_EN BIT(5)
182 #define QCA956X_MAC_CFG2_LEN_CHECK BIT(4)
[all …]
/linux/drivers/staging/sm750fb/
H A Dddk750_reg.h7 #define DE_STATE1_DE_ABORT BIT(0)
10 #define DE_STATE2_DE_FIFO_EMPTY BIT(3)
11 #define DE_STATE2_DE_STATUS_BUSY BIT(2)
12 #define DE_STATE2_DE_MEM_FIFO_EMPTY BIT(1)
20 #define SYSTEM_CTRL_PCI_BURST BIT(29)
21 #define SYSTEM_CTRL_PCI_MASTER BIT(25)
22 #define SYSTEM_CTRL_LATENCY_TIMER_OFF BIT(24)
23 #define SYSTEM_CTRL_DE_FIFO_EMPTY BIT(23)
24 #define SYSTEM_CTRL_DE_STATUS_BUSY BIT(22)
25 #define SYSTEM_CTRL_DE_MEM_FIFO_EMPTY BIT(21)
[all …]
/linux/drivers/gpu/drm/mcde/
H A Dmcde_dsi_regs.h8 #define DSI_MCTL_MAIN_DATA_CTL_LINK_EN BIT(0)
9 #define DSI_MCTL_MAIN_DATA_CTL_IF1_MODE BIT(1)
10 #define DSI_MCTL_MAIN_DATA_CTL_VID_EN BIT(2)
11 #define DSI_MCTL_MAIN_DATA_CTL_TVG_SEL BIT(3)
12 #define DSI_MCTL_MAIN_DATA_CTL_TBG_SEL BIT(4)
13 #define DSI_MCTL_MAIN_DATA_CTL_IF1_TE_EN BIT(5)
14 #define DSI_MCTL_MAIN_DATA_CTL_IF2_TE_EN BIT(6)
15 #define DSI_MCTL_MAIN_DATA_CTL_REG_TE_EN BIT(7)
16 #define DSI_MCTL_MAIN_DATA_CTL_READ_EN BIT(8)
17 #define DSI_MCTL_MAIN_DATA_CTL_BTA_EN BIT(9)
[all …]
/linux/drivers/net/dsa/microchip/
H A Dksz9477_reg.h43 #define SW_GIGABIT_ABLE BIT(6)
44 #define SW_REDUNDANCY_ABLE BIT(5)
45 #define SW_AVB_ABLE BIT(4)
63 #define SW_QW_ABLE BIT(5)
69 #define LUE_INT BIT(31)
70 #define TRIG_TS_INT BIT(30)
71 #define APB_TIMEOUT_INT BIT(29)
82 #define SW_SPARE_REG_2 BIT(7)
83 #define SW_SPARE_REG_1 BIT(6)
84 #define SW_SPARE_REG_0 BIT(5)
[all …]
/linux/sound/soc/codecs/
H A Dmt6357.h16 #define MT6357_GPIO8_DIR_MASK BIT(8)
18 #define MT6357_GPIO8_DIR_OUTPUT BIT(8)
19 #define MT6357_GPIO9_DIR_MASK BIT(9)
21 #define MT6357_GPIO9_DIR_OUTPUT BIT(9)
22 #define MT6357_GPIO10_DIR_MASK BIT(10)
24 #define MT6357_GPIO10_DIR_OUTPUT BIT(10)
25 #define MT6357_GPIO11_DIR_MASK BIT(11)
27 #define MT6357_GPIO11_DIR_OUTPUT BIT(11)
28 #define MT6357_GPIO12_DIR_MASK BIT(12)
30 #define MT6357_GPIO12_DIR_OUTPUT BIT(12)
[all …]
/linux/include/linux/mfd/
H A Dtps6594.h249 #define TPS6594_BIT_BUCK_EN BIT(0)
250 #define TPS6594_BIT_BUCK_FPWM BIT(1)
251 #define TPS6594_BIT_BUCK_FPWM_MP BIT(2)
252 #define TPS6594_BIT_BUCK_VSEL BIT(3)
253 #define TPS6594_BIT_BUCK_VMON_EN BIT(4)
254 #define TPS6594_BIT_BUCK_PLDN BIT(5)
255 #define TPS6594_BIT_BUCK_RV_SEL BIT(7)
279 #define TPS6594_BIT_LDO_EN BIT(0)
280 #define TPS6594_BIT_LDO_SLOW_RAMP BIT(1)
281 #define TPS6594_BIT_LDO_VMON_EN BIT(4)
[all …]
/linux/drivers/comedi/drivers/
H A Dni_stc.h25 #define NISTC_INTA_ACK_G0_GATE BIT(15)
26 #define NISTC_INTA_ACK_G0_TC BIT(14)
27 #define NISTC_INTA_ACK_AI_ERR BIT(13)
28 #define NISTC_INTA_ACK_AI_STOP BIT(12)
29 #define NISTC_INTA_ACK_AI_START BIT(11)
30 #define NISTC_INTA_ACK_AI_START2 BIT(10)
31 #define NISTC_INTA_ACK_AI_START1 BIT(9)
32 #define NISTC_INTA_ACK_AI_SC_TC BIT(8)
33 #define NISTC_INTA_ACK_AI_SC_TC_ERR BIT(7)
34 #define NISTC_INTA_ACK_G0_TC_ERR BIT(6)
[all …]
/linux/drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/
H A Dsun8i_a83t_mipi_csi2_reg.h14 #define SUN8I_A83T_MIPI_CSI2_CTRL_RESET_N BIT(31)
24 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_ECC_ERR_DBL BIT(28)
25 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_CKSM_ERR_VC3 BIT(27)
26 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_CKSM_ERR_VC2 BIT(26)
27 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_CKSM_ERR_VC1 BIT(25)
28 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_CKSM_ERR_VC0 BIT(24)
29 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_SEQ_ERR_DT3 BIT(23)
30 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_SEQ_ERR_DT2 BIT(22)
31 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_SEQ_ERR_DT1 BIT(21)
32 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_SEQ_ERR_DT0 BIT(20)
[all …]
/linux/include/linux/mfd/abx500/
H A Dab8500-sysctrl.h83 #define AB8500_TURNONSTATUS_PORNVBAT BIT(0)
84 #define AB8500_TURNONSTATUS_PONKEY1DBF BIT(1)
85 #define AB8500_TURNONSTATUS_PONKEY2DBF BIT(2)
86 #define AB8500_TURNONSTATUS_RTCALARM BIT(3)
87 #define AB8500_TURNONSTATUS_MAINCHDET BIT(4)
88 #define AB8500_TURNONSTATUS_VBUSDET BIT(5)
89 #define AB8500_TURNONSTATUS_USBIDDETECT BIT(6)
91 #define AB8500_RESETSTATUS_RESETN4500NSTATUS BIT(0)
92 #define AB8500_RESETSTATUS_SWRESETN4500NSTATUS BIT(2)
97 #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ1STATUS BIT(0)
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192d/
H A Dreg.h71 #define MAC0_ON BIT(7)
72 #define MAC1_ON BIT(0)
73 #define MAC0_READY BIT(0)
74 #define MAC1_READY BIT(0)
368 #define RRSR_1M BIT(0)
369 #define RRSR_2M BIT(1)
370 #define RRSR_5_5M BIT(2)
371 #define RRSR_11M BIT(3)
372 #define RRSR_6M BIT(4)
373 #define RRSR_9M BIT(5)
[all …]
/linux/drivers/scsi/
H A Dnsp32.h83 # define IRQSTATUS_LATCHED_MSG BIT(0)
84 # define IRQSTATUS_LATCHED_IO BIT(1)
85 # define IRQSTATUS_LATCHED_CD BIT(2)
86 # define IRQSTATUS_LATCHED_BUS_FREE BIT(3)
87 # define IRQSTATUS_RESELECT_OCCUER BIT(4)
88 # define IRQSTATUS_PHASE_CHANGE_IRQ BIT(5)
89 # define IRQSTATUS_SCSIRESET_IRQ BIT(6)
90 # define IRQSTATUS_TIMER_IRQ BIT(7)
91 # define IRQSTATUS_FIFO_SHLD_IRQ BIT(8)
92 # define IRQSTATUS_PCI_IRQ BIT(9)
[all …]
/linux/drivers/net/ethernet/asix/
H A Dax88796c_main.h121 #define AX_FC_RX BIT(0)
122 #define AX_FC_TX BIT(1)
123 #define AX_FC_ANEG BIT(2)
126 #define AX_CAP_COMP BIT(0)
153 #define PSR_DEV_READY BIT(7)
155 #define PSR_RESET_CLR BIT(15)
158 #define FER_IPALM BIT(0)
159 #define FER_DCRC BIT(1)
160 #define FER_RH3M BIT(2)
161 #define FER_HEADERSWAP BIT(7)
[all …]
/linux/drivers/usb/typec/tcpm/
H A Dfusb302_reg.h13 #define FUSB_REG_SWITCHES0_CC2_PU_EN BIT(7)
14 #define FUSB_REG_SWITCHES0_CC1_PU_EN BIT(6)
15 #define FUSB_REG_SWITCHES0_VCONN_CC2 BIT(5)
16 #define FUSB_REG_SWITCHES0_VCONN_CC1 BIT(4)
17 #define FUSB_REG_SWITCHES0_MEAS_CC2 BIT(3)
18 #define FUSB_REG_SWITCHES0_MEAS_CC1 BIT(2)
19 #define FUSB_REG_SWITCHES0_CC2_PD_EN BIT(1)
20 #define FUSB_REG_SWITCHES0_CC1_PD_EN BIT(0)
22 #define FUSB_REG_SWITCHES1_POWERROLE BIT(7)
23 #define FUSB_REG_SWITCHES1_SPECREV1 BIT(6)
[all …]
/linux/drivers/net/ethernet/mediatek/
H A Dmtk_wed_regs.h7 #define MTK_WFDMA_DESC_CTRL_TO_HOST BIT(8)
10 #define MTK_WDMA_DESC_CTRL_LAST_SEG1 BIT(15)
11 #define MTK_WDMA_DESC_CTRL_BURST BIT(16)
13 #define MTK_WDMA_DESC_CTRL_LAST_SEG0 BIT(30)
14 #define MTK_WDMA_DESC_CTRL_DMA_DONE BIT(31)
16 #define MTK_WDMA_TXD0_DESC_INFO_DMA_DONE BIT(29)
17 #define MTK_WDMA_TXD1_DESC_INFO_DMA_DONE BIT(31)
29 #define MTK_WED_RESET_TX_BM BIT(0)
30 #define MTK_WED_RESET_RX_BM BIT(1)
31 #define MTK_WED_RESET_RX_PG_BM BIT(2)
[all …]
/linux/drivers/hid/intel-thc-hid/intel-thc/
H A Dintel-thc-hw.h240 #define TXN_ERR_INT_STS_BIT BIT(28)
241 #define TXN_FATAL_INT_STS_BIT BIT(30)
243 #define NONDMA_INT_STS_BIT BIT(4)
244 #define EOF_INT_STS_BIT BIT(5)
249 #define THC_CFG_STS_CMD_IOSE BIT(0)
250 #define THC_CFG_STS_CMD_MSE BIT(1)
251 #define THC_CFG_STS_CMD_BME BIT(2)
252 #define THC_CFG_STS_CMD_SPCYC BIT(3)
253 #define THC_CFG_STS_CMD_MWRIEN BIT(4)
254 #define THC_CFG_STS_CMD_VGAPS BIT(5)
[all …]
/linux/drivers/net/ieee802154/
H A Dmcr20a.h257 #define DAR_IRQSTS1_RX_FRM_PEND BIT(7)
258 #define DAR_IRQSTS1_PLL_UNLOCK_IRQ BIT(6)
259 #define DAR_IRQSTS1_FILTERFAIL_IRQ BIT(5)
260 #define DAR_IRQSTS1_RXWTRMRKIRQ BIT(4)
261 #define DAR_IRQSTS1_CCAIRQ BIT(3)
262 #define DAR_IRQSTS1_RXIRQ BIT(2)
263 #define DAR_IRQSTS1_TXIRQ BIT(1)
264 #define DAR_IRQSTS1_SEQIRQ BIT(0)
267 #define DAR_IRQSTS2_CRCVALID BIT(7)
268 #define DAR_IRQSTS2_CCA BIT(6)
[all …]

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