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Searched refs:BIF_VDDGFX_GFX3_UPPER__VDDGFX_GFX3_REG_UPPER_MASK (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_5_0_sh_mask.h633 #define BIF_VDDGFX_GFX3_UPPER__VDDGFX_GFX3_REG_UPPER_MASK 0x3fffc macro
H A Dbif_5_1_sh_mask.h601 #define BIF_VDDGFX_GFX3_UPPER__VDDGFX_GFX3_REG_UPPER_MASK 0x3fffc macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_sh_mask.h117944 #define BIF_VDDGFX_GFX3_UPPER__VDDGFX_GFX3_REG_UPPER_MASK … macro
H A Dnbio_6_1_sh_mask.h17668 #define BIF_VDDGFX_GFX3_UPPER__VDDGFX_GFX3_REG_UPPER_MASK … macro