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Searched refs:BIF_CFG_DEV0_EPF1_DEVICE_CAP__FLR_CAPABLE_MASK (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_3_1_sh_mask.h7795 #define BIF_CFG_DEV0_EPF1_DEVICE_CAP__FLR_CAPABLE_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_9_0_sh_mask.h6062 #define BIF_CFG_DEV0_EPF1_DEVICE_CAP__FLR_CAPABLE_MASK … macro
H A Dnbio_4_3_0_sh_mask.h48019 #define BIF_CFG_DEV0_EPF1_DEVICE_CAP__FLR_CAPABLE_MASK … macro
H A Dnbio_2_3_sh_mask.h23740 #define BIF_CFG_DEV0_EPF1_DEVICE_CAP__FLR_CAPABLE_MASK … macro
H A Dnbio_7_2_0_sh_mask.h5943 #define BIF_CFG_DEV0_EPF1_DEVICE_CAP__FLR_CAPABLE_MASK … macro
H A Dnbio_7_7_0_sh_mask.h6206 #define BIF_CFG_DEV0_EPF1_DEVICE_CAP__FLR_CAPABLE_MASK … macro