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/linux/drivers/comedi/drivers/ni_routing/ni_route_values/
H A Dni_mseries.c56 [B(NI_PFI(0))] = {
57 [B(TRIGGER_LINE(0))] = I(18),
58 [B(TRIGGER_LINE(1))] = I(19),
59 [B(TRIGGER_LINE(2))] = I(20),
60 [B(TRIGGER_LINE(3))] = I(21),
61 [B(TRIGGER_LINE(4))] = I(22),
62 [B(TRIGGER_LINE(5))] = I(23),
63 [B(TRIGGER_LINE(6))] = I(24),
64 [B(TRIGGER_LINE(7))] = I(25),
65 [B(NI_CtrSource(0))] = I(9),
[all …]
H A Dni_eseries.c53 [B(NI_PFI(0))] = {
54 [B(NI_AI_StartTrigger)] = I(NI_PFI_OUTPUT_AI_START1),
56 [B(NI_PFI(1))] = {
57 [B(NI_AI_ReferenceTrigger)] = I(NI_PFI_OUTPUT_AI_START2),
59 [B(NI_PFI(2))] = {
60 [B(NI_AI_ConvertClock)] = I(NI_PFI_OUTPUT_AI_CONVERT),
62 [B(NI_PFI(3))] = {
63 [B(NI_CtrSource(1))] = I(NI_PFI_OUTPUT_G_SRC1),
65 [B(NI_PFI(4))] = {
66 [B(NI_CtrGate(1))] = I(NI_PFI_OUTPUT_G_GATE1),
[all …]
H A Dni_660x.c48 [B(NI_PFI(8))] = {
49 [B(NI_CtrInternalOutput(7))] = I(1),
51 [B(NI_PFI(10))] = {
52 [B(NI_CtrGate(7))] = I(1),
54 [B(NI_PFI(11))] = {
55 [B(NI_CtrSource(7))] = I(1),
57 [B(NI_PFI(12))] = {
58 [B(NI_CtrInternalOutput(6))] = I(1),
60 [B(NI_PFI(14))] = {
61 [B(NI_CtrGate(6))] = I(1),
[all …]
/linux/rust/kernel/sync/
H A Dlock.rs103 /// [`Backend`] specified as the generic parameter `B`.
106 pub struct Lock<T: ?Sized, B: Backend> {
109 state: Opaque<B::State>,
123 unsafe impl<T: ?Sized + Send, B: Backend> Send for Lock<T, B> {}
127 unsafe impl<T: ?Sized + Send, B: Backend> Sync for Lock<T, B> {}
129 impl<T, B: Backend> Lock<T, B> {
142 B in new()
172 lock(&self) -> Guard<'_, T, B> lock() argument
185 try_lock(&self) -> Option<Guard<'_, T, B>> try_lock() argument
234 lock_ref(&self) -> &'a Lock<T, B> lock_ref() argument
307 new(lock: &'a Lock<T, B>, state: B::GuardState) -> Self new() argument
[all...]
H A Dcondvar.rs114 fn wait_internal<T: ?Sized, B: Backend>( in wait_internal()
117 guard: &mut Guard<'_, T, B>, in wait_internal() argument
145 pub fn wait<T: ?Sized, B: Backend>(&self, guard: &mut Guard<'_, T, B>) { in wait() argument
156 pub fn wait_interruptible<T: ?Sized, B: Backend>(&self, guard: &mut Guard<'_, T, B>) -> bool { in wait_interruptible()
168 pub fn wait_interruptible_freezable<T: ?Sized, B: Backend>( in wait_interruptible_freezable()
170 guard: &mut Guard<'_, T, B>, in wait_interruptible_freezable() argument
186 pub fn wait_interruptible_timeout<T: ?Sized, B: Backend>( in wait_interruptible_timeout()
188 guard: &mut Guard<'_, T, B>, in wait_interruptible_timeout() argument
/linux/rust/kernel/sync/lock/
H A Dglobal.rs36 pub struct GlobalLock<B: GlobalLockBackend> {
37 inner: Lock<B::Item, B::Backend>,
40 impl<B: GlobalLockBackend> GlobalLock<B> {
46 /// * The type `B` must not be used with any other lock.
47 pub const unsafe fn new(data: B::Item) -> Self { in new()
71 B::Backend::init( in init()
73 B::NAME.as_char_ptr(), in init()
74 B in init()
80 lock(&'static self) -> GlobalGuard<B> lock() argument
87 try_lock(&'static self) -> Option<GlobalGuard<B>> try_lock() argument
[all...]
/linux/drivers/comedi/drivers/
H A Dni_routes.c163 if (RVi(rv, B(src), B(dest))) in ni_count_valid_routes()
167 (RVi(rv, B(src), B(NI_RGOUT0)) || in ni_count_valid_routes()
168 RVi(rv, B(src), B(NI_RTSI_BRD(0))) || in ni_count_valid_routes()
169 RVi(rv, B(src), B(NI_RTSI_BRD(1))) || in ni_count_valid_routes()
170 RVi(rv, B(src), B(NI_RTSI_BRD(2))) || in ni_count_valid_routes()
171 RVi(rv, B(src), B(NI_RTSI_BRD(3))))) { in ni_count_valid_routes()
218 if (RVi(rv, B(src), B(dest))) in ni_get_valid_routes()
222 (RVi(rv, B(src), B(NI_RGOUT0)) || in ni_get_valid_routes()
223 RVi(rv, B(src), B(NI_RTSI_BRD(0))) || in ni_get_valid_routes()
224 RVi(rv, B(src), B(NI_RTSI_BRD(1))) || in ni_get_valid_routes()
[all …]
/linux/lib/zstd/common/
H A Dcpu.h162 #define B(name, bit) X(name, f7b, bit) macro
163 B(bmi1, 3)
164 B(hle, 4)
165 B(avx2, 5)
166 B(smep, 7)
167 B(bmi2, 8)
168 B(erms, 9)
169 B(invpcid, 10)
170 B(rtm, 11)
171 B(mpx, 14)
[all …]
/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-srggb10-ipu3.rst40 - B\ :sub:`0000low`
43 B\ :sub:`0000high`\ (bits 1--0)
44 - B\ :sub:`0002low`\ (bits 7--4)
49 B\ :sub:`0002high`\ (bits 5--0)
52 - B\ :sub:`0004low`
55 B\ :sub:`0004high`\ (bits 1--0)
56 - B\ :sub:`0006low`\ (bits 7--4)
62 B\ :sub:`0006high`\ (bits 5--0)
64 - B\ :sub:`0008low`
67 B\ :sub:`0008high`\ (bits 1--0)
[all …]
H A Dmetafmt-vsp1-hgo.rst32 - In *64 bins maximum mode*, the HGO operates on the maximum of the (R, G, B)
37 - In *256 bins maximum mode*, the HGO operates on the maximum of the (R, G, B)
68 - B/Cb/V max [7:0]
70 - B/Cb/V min [7:0]
76 - :cspan:`4` B/Cb/V sum [31:0]
90 - :cspan:`4` B/Cb/V bin 0 [31:0]
94 - :cspan:`4` B/Cb/V bin 63 [31:0]
109 - max(R,G,B) max [7:0]
111 - max(R,G,B) min [7:0]
113 - :cspan:`4` max(R,G,B) sum [31:0]
[all …]
/linux/scripts/coccinelle/misc/
H A Dboolconv.cocci19 expression A, B;
24 A == B
26 A != B
28 A > B
30 A < B
32 A >= B
34 A <= B
36 A && B
38 A || B
47 expression A, B;
[all …]
H A Dexcluded_middle.cocci3 /// Condition !A || A && B is equivalent to !A || B.
15 expression A, B;
19 * !A || (A &&@p B)
22 expression A, B;
26 - (A && B)
27 + B
33 coccilib.report.print_report(p[0], "WARNING !A || A && B is equivalent to !A || B")
39 coccilib.org.print_todo(p[0], "WARNING !A || A && B is equivalent to !A || B")
/linux/arch/arm/mach-omap1/
H A Dmux.c75 MUX_CFG("USB2_SUSP", B, 3, 1, 2, 17, 0, NA, 0, 1)
76 MUX_CFG("USB2_VP", B, 6, 1, 2, 18, 0, NA, 0, 1)
77 MUX_CFG("USB2_TXEN", B, 9, 1, 2, 19, 0, NA, 0, 1)
126 MUX_CFG("BALLOUT_V8_ARMIO3", B, 18, 0, 2, 25, 1, NA, 0, 1)
130 MUX_CFG("W8_1610_MMC2_DAT0", B, 21, 6, 2, 23, 1, 2, 1, 1)
131 MUX_CFG("V8_1610_MMC2_DAT1", B, 27, 6, 2, 25, 1, 2, 1, 1)
133 MUX_CFG("R10_1610_MMC2_DAT3", B, 18, 6, 2, 22, 1, 2, 1, 1)
134 MUX_CFG("Y10_1610_MMC2_CLK", B, 3, 6, 2, 17, 0, 2, 0, 1)
135 MUX_CFG("Y8_1610_MMC2_CMD", B, 24, 6, 2, 24, 1, 2, 1, 1)
136 MUX_CFG("V9_1610_MMC2_CMDDIR", B, 12, 6, 2, 20, 0, 2, 1, 1)
[all …]
/linux/lib/crypto/x86/
H A Dsha1-ssse3-and-avx.S114 mov 4(HASH_PTR), B
127 RR F1,A,B,C,D,E,0
128 RR F1,D,E,A,B,C,2
129 RR F1,B,C,D,E,A,4
130 RR F1,E,A,B,C,D,6
131 RR F1,C,D,E,A,B,8
133 RR F1,A,B,C,D,E,10
134 RR F1,D,E,A,B,C,12
135 RR F1,B,C,D,E,A,14
136 RR F1,E,A,B,C,D,16
[all …]
/linux/Documentation/translations/zh_CN/driver-api/
H A Dio_ordering.rst34 CPU B: spin_lock_irqsave(&dev_lock, flags)
35 CPU B: val = readl(my_status);
36 CPU B: ...
37 CPU B: writel(newval2, ring_ptr);
38 CPU B: spin_unlock_irqrestore(&dev_lock, flags)
52 CPU B: spin_lock_irqsave(&dev_lock, flags)
53 CPU B: val = readl(my_status);
54 CPU B: ...
55 CPU B: writel(newval2, ring_ptr);
56 CPU B: (void)readl(safe_register); /* 配置寄存器？*/
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32h7-pinctrl.dtsi49 pinmux = <STM32_PINMUX('B', 6, AF4)>, /* I2C1_SCL */
50 <STM32_PINMUX('B', 7, AF4)>; /* I2C1_SDA */
120 <STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */
126 pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */
135 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
136 <STM32_PINMUX('B', 8, ANALOG)>; /* SDMMC1_CKIN */
142 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC1_D0 */
143 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */
144 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */
145 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */
[all …]
H A Dstm32f7-pinctrl.dtsi159 pinmux = <STM32_PINMUX('B', 7, AF7)>; /* USART1_RX */
166 pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1 SDA */
167 <STM32_PINMUX('B', 8, AF4)>; /* I2C1 SCL */
191 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
192 <STM32_PINMUX('B', 1, AF10)>, /* OTG_HS_ULPI_D2 */
193 <STM32_PINMUX('B', 10, AF10)>, /* OTG_HS_ULPI_D3 */
194 <STM32_PINMUX('B', 11, AF10)>, /* OTG_HS_ULPI_D4 */
195 <STM32_PINMUX('B', 12, AF10)>, /* OTG_HS_ULPI_D5 */
196 <STM32_PINMUX('B', 13, AF10)>, /* OTG_HS_ULPI_D6 */
197 <STM32_PINMUX('B', 5, AF10)>; /* OTG_HS_ULPI_D7 */
[all …]
H A Dstm32f4-pinctrl.dtsi180 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
186 pinmux = <STM32_PINMUX('B', 11, AF7)>; /* USART3_RX */
204 pinmux = <STM32_PINMUX('B', 12, AF12)>, /* OTG_HS_ID */
205 <STM32_PINMUX('B', 14, AF12)>, /* OTG_HS_DM */
206 <STM32_PINMUX('B', 15, AF12)>; /* OTG_HS_DP */
220 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
221 <STM32_PINMUX('B', 1, AF10)>, /* OTG_HS_ULPI_D2 */
222 <STM32_PINMUX('B', 10, AF10)>, /* OTG_HS_ULPI_D3 */
223 <STM32_PINMUX('B', 11, AF10)>, /* OTG_HS_ULPI_D4 */
224 <STM32_PINMUX('B', 12, AF10)>, /* OTG_HS_ULPI_D5 */
[all …]
/linux/drivers/comedi/drivers/tests/
H A Dni_routes_test.c28 #define B(x) ((x) - NI_NAMES_BASE) macro
135 [B(NI_RGOUT0)] = {[B(rgout0_src0)] = V(0),
136 [B(rgout0_src1)] = V(1)},
137 [B(NI_RTSI_BRD(0))] = {[B(brd0_src0)] = V(0),
138 [B(brd0_src1)] = V(1)},
139 [B(NI_RTSI_BRD(1))] = {[B(brd1_src0)] = V(0),
140 [B(brd1_src1)] = V(1)},
141 [B(NI_RTSI_BRD(2))] = {[B(brd2_src0)] = V(0),
142 [B(brd2_src1)] = V(1)},
143 [B(NI_RTSI_BRD(3))] = {[B(brd3_src0)] = V(0),
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91sam9x5_macb1.dtsi19 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */
20 AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */
21 AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */
22 AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
23 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
24 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
25 AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */
26 AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */
27 AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
28 AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */
/linux/Documentation/usb/
H A Dchipidea.rst39 is micro B plug.
41 The A-device (with micro A plug inserted) should enumerate B-device.
45 On B-device::
49 B-device should take host role and enumerate A-device.
53 On B-device::
57 or, by introducing HNP polling, B-Host can know when A-peripheral wishes to
59 A-peripheral side by answering the polling from B-Host. This can be done on
64 A-device should switch back to host and enumerate B-device.
66 5) Remove B-device (unplug micro B plug) and insert again in 10 seconds;
67 A-device should enumerate B-device again.
[all …]
/linux/drivers/macintosh/
H A Dvia-cuda.c40 #define B 0 /* B-side data */ macro
111 out_8(&via[B], in_8(&via[B]) | TIP); in assert_TIP()
113 out_8(&via[B], in_8(&via[B]) & ~TIP); in assert_TIP()
120 out_8(&via[B], in_8(&via[B]) | TIP | TACK); in assert_TIP_and_TACK()
122 out_8(&via[B], in_8(&via[B]) & ~(TIP | TACK)); in assert_TIP_and_TACK()
129 out_8(&via[B], in_8(&via[B]) | TACK); in assert_TACK()
131 out_8(&via[B], in_8(&via[B]) & ~TACK); in assert_TACK()
136 out_8(&via[B], in_8(&via[B]) ^ TACK); in toggle_TACK()
143 out_8(&via[B], in_8(&via[B]) & ~TACK); in negate_TACK()
145 out_8(&via[B], in_8(&via[B]) | TACK); in negate_TACK()
[all …]
/linux/tools/testing/selftests/net/netfilter/
H A Dnft_concat_range.sh539 ip netns add B
543 ip link set veth_b netns B
545 ip -n B link set veth_b up
554 ip -n B route add default dev veth_b
556 ip -6 -n B addr add fe80::2/64 dev veth_b nodad
557 ip -6 -n B addr add 2001:db8::2/64 dev veth_b nodad
558 ip -6 -n B route add default dev veth_b
560 B() { function
561 ip netns exec B "$@" >/dev/null 2>&1
586 B ping -c1 -W1 "${dst_addr4}" >/dev/null 2>&1
[all …]
/linux/Documentation/translations/zh_TW/
H A Dio_ordering.txt41 CPU B: spin_lock_irqsave(&dev_lock, flags)
42 CPU B: val = readl(my_status);
43 CPU B: ...
44 CPU B: writel(newval2, ring_ptr);
45 CPU B: spin_unlock_irqrestore(&dev_lock, flags)
59 CPU B: spin_lock_irqsave(&dev_lock, flags)
60 CPU B: val = readl(my_status);
61 CPU B: ...
62 CPU B: writel(newval2, ring_ptr);
63 CPU B: (void)readl(safe_register); /* 配置寄存器？*/
[all …]
/linux/Documentation/driver-api/
H A Dio_ordering.rst24 CPU B: spin_lock_irqsave(&dev_lock, flags)
25 CPU B: val = readl(my_status);
26 CPU B: ...
27 CPU B: writel(newval2, ring_ptr);
28 CPU B: spin_unlock_irqrestore(&dev_lock, flags)
42 CPU B: spin_lock_irqsave(&dev_lock, flags)
43 CPU B: val = readl(my_status);
44 CPU B: ...
45 CPU B: writel(newval2, ring_ptr);
46 CPU B: (void)readl(safe_register); /* maybe a config register? */
[all …]

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