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Searched refs:A_BCM1480_IMR_CPU0_BASE (Results 1 – 2 of 2) sorted by relevance

/linux/arch/mips/sibyte/bcm1480/
H A Dsmp.c26 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
33 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
40 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
/linux/arch/mips/include/asm/sibyte/
H A Dbcm1480_regs.h354 #define A_BCM1480_IMR_CPU0_BASE 0x0010020000 macro
361 #define A_BCM1480_IMR_MAPPER(cpu) (A_BCM1480_IMR_CPU0_BASE+(cpu)*BCM1480_IMR_REGISTER_SPACING)
418 (A_BCM1480_IMR_CPU0_BASE + \