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Searched refs:ATTR0A__ATTR_PAL__SHIFT (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h401 #define ATTR0A__ATTR_PAL__SHIFT 0x00000000 macro
H A Ddce_8_0_sh_mask.h10900 #define ATTR0A__ATTR_PAL__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h11096 #define ATTR0A__ATTR_PAL__SHIFT 0x0 macro
H A Ddce_10_0_sh_mask.h11284 #define ATTR0A__ATTR_PAL__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h12350 #define ATTR0A__ATTR_PAL__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h64748 #define ATTR0A__ATTR_PAL__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h27503 #define ATTR0A__ATTR_PAL__SHIFT … macro
H A Ddcn_1_0_sh_mask.h46409 #define ATTR0A__ATTR_PAL__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h45496 #define ATTR0A__ATTR_PAL__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h48731 #define ATTR0A__ATTR_PAL__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h48773 #define ATTR0A__ATTR_PAL__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h52915 #define ATTR0A__ATTR_PAL__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h51986 #define ATTR0A__ATTR_PAL__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h54718 #define ATTR0A__ATTR_PAL__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h404 #define ATTR0A__ATTR_PAL__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h54568 #define ATTR0A__ATTR_PAL__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h60020 #define ATTR0A__ATTR_PAL__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h63164 #define ATTR0A__ATTR_PAL__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h48772 #define ATTR0A__ATTR_PAL__SHIFT … macro