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Searched refs:AT91_PMC_PLL_CTRL0 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/clk/at91/
H A Dclk-sam9x60-pll.c132 regmap_update_bits(regmap, AT91_PMC_PLL_CTRL0, in sam9x60_frac_pll_set()
167 regmap_update_bits(regmap, AT91_PMC_PLL_CTRL0, AT91_PMC_PLL_CTRL0_ENPLL, 0); in sam9x60_frac_pll_unprepare()
283 regmap_update_bits(regmap, AT91_PMC_PLL_CTRL0, in sam9x60_frac_pll_set_rate_chg()
353 regmap_update_bits(regmap, AT91_PMC_PLL_CTRL0, in sam9x60_div_pll_set_div()
375 regmap_read(regmap, AT91_PMC_PLL_CTRL0, &val); in sam9x60_div_pll_set()
408 regmap_update_bits(regmap, AT91_PMC_PLL_CTRL0, in sam9x60_div_pll_unprepare()
429 regmap_read(regmap, AT91_PMC_PLL_CTRL0, &val); in sam9x60_div_pll_is_prepared()
530 regmap_read(regmap, AT91_PMC_PLL_CTRL0, &val); in sam9x60_div_pll_set_rate_chg()
586 regmap_read(regmap, AT91_PMC_PLL_CTRL0, &val); in sam9x60_div_pll_notifier_fn()
779 regmap_read(regmap, AT91_PMC_PLL_CTRL0, &val); in sam9x60_clk_register_div_pll()
/linux/arch/arm/mach-at91/
H A Dpm_suspend.S675 ldr tmp2, [pmc, #AT91_PMC_PLL_CTRL0]
692 ldr tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
695 str tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
704 ldr tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
706 str tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
759 ldr tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
767 str tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
/linux/include/linux/clk/
H A Dat91_pmc.h38 #define AT91_PMC_PLL_CTRL0 0x0C /* PLL Control Register 0 [for SAM9X60] */ macro