Searched refs:AT91_PMC_MCKR (Results 1 – 3 of 3) sorted by relevance
34 regmap_read(h32mxclk->regmap, AT91_PMC_MCKR, &mckr); in clk_sama5d4_h32mx_recalc_rate()72 regmap_update_bits(h32mxclk->regmap, AT91_PMC_MCKR, in clk_sama5d4_h32mx_set_rate()
28 regmap_read(plldiv->regmap, AT91_PMC_MCKR, &mckr); in clk_plldiv_recalc_rate()61 regmap_update_bits(plldiv->regmap, AT91_PMC_MCKR, AT91_PMC_PLLADIV2, in clk_plldiv_set_rate()
103 #define AT91_PMC_MCKR 0x30 /* Master Clock Register */ macro