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Searched refs:AR_SM1_BASE (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/net/wireless/ath/ath9k/
H A Dreg_aic.h30 #define AR_PHY_AIC_CTRL_0_B1 (AR_SM1_BASE + 0x4b0)
31 #define AR_PHY_AIC_CTRL_1_B1 (AR_SM1_BASE + 0x4b4)
32 #define AR_PHY_AIC_CTRL_4_B1 (AR_SM1_BASE + 0x4c0)
34 #define AR_PHY_AIC_STAT_0_B1 (AR_SM1_BASE + 0x4c4)
35 #define AR_PHY_AIC_STAT_1_B1 (AR_SM1_BASE + 0x4c8)
36 #define AR_PHY_AIC_STAT_2_B1 (AR_SM1_BASE + 0x4cc)
41 #define AR_PHY_AIC_SRAM_ADDR_B1 (AR_SM1_BASE + 0x5f0)
42 #define AR_PHY_AIC_SRAM_DATA_B1 (AR_SM1_BASE + 0x5f4)
H A Dar9003_phy.h568 #define AR_PHY_TPC_11_B1 (AR_SM1_BASE + 0x220)
964 #define AR_SM1_BASE 0xb200 macro
966 #define AR_PHY_SWITCH_CHAIN_1 (AR_SM1_BASE + 0x84)
967 #define AR_PHY_FCAL_2_1 (AR_SM1_BASE + 0xd0)
968 #define AR_PHY_DFT_TONE_CTL_1 (AR_SM1_BASE + 0xd4)
969 #define AR_PHY_CL_TAB_1 (AR_SM1_BASE + 0x100)
970 #define AR_PHY_CHAN_INFO_GAIN_1 (AR_SM1_BASE + 0x180)
971 #define AR_PHY_TPC_4_B1 (AR_SM1_BASE + 0x204)
972 #define AR_PHY_TPC_5_B1 (AR_SM1_BASE + 0x208)
973 #define AR_PHY_TPC_6_B1 (AR_SM1_BASE + 0x20c)
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