Home
last modified time | relevance | path

Searched refs:ARM_CKCTL (Results 1 – 5 of 5) sorted by relevance

/linux/arch/arm/mach-omap1/
H A Dsram.S29 mov r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0xff000000
30 orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x00ff0000
31 orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
H A Dpm.c251 ARM_SAVE(ARM_CKCTL); in omap1_pm_suspend()
273 omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); in omap1_pm_suspend()
341 ARM_RESTORE(ARM_CKCTL); in omap1_pm_suspend()
393 ARM_SAVE(ARM_CKCTL); in omap_pm_debug_show()
441 ARM_SHOW(ARM_CKCTL), in omap_pm_debug_show()
H A Dclock.c169 int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); in omap1_ckctl_recalc()
312 regval = omap_readw(ARM_CKCTL); in omap1_clk_set_rate_ckctl_arm()
316 omap_writew(regval, ARM_CKCTL); in omap1_clk_set_rate_ckctl_arm()
541 if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL)) in omap1_clk_enable_generic()
562 if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL)) in omap1_clk_enable_generic()
586 if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL)) in omap1_clk_disable_generic()
607 if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_CKCTL)) in omap1_clk_disable_generic()
H A Dclock_data.c200 .enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL),
733 omap_readw(ARM_CKCTL)); in omap1_clk_init()
776 omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); in omap1_clk_init()
/linux/include/linux/soc/ti/
H A Domap1-io.h71 #define ARM_CKCTL (CLKGEN_REG_BASE + 0x0) macro