Searched refs:ARM64_FEATURE_MASK (Results 1 – 7 of 7) sorted by relevance
1593 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE); in __kvm_read_sanitised_id_reg()1595 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_SME); in __kvm_read_sanitised_id_reg()1596 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_RNDR_trap); in __kvm_read_sanitised_id_reg()1597 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_NMI); in __kvm_read_sanitised_id_reg()1598 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE_frac); in __kvm_read_sanitised_id_reg()1599 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_GCS); in __kvm_read_sanitised_id_reg()1600 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_THE); in __kvm_read_sanitised_id_reg()1601 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTEX); in __kvm_read_sanitised_id_reg()1602 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_DF2); in __kvm_read_sanitised_id_reg()1603 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_PFAR); in __kvm_read_sanitised_id_reg()[all …]
2389 val &= ~(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2) | in get_hyp_id_aa64pfr0_el1()2390 ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3)); in get_hyp_id_aa64pfr0_el1()2392 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2), in get_hyp_id_aa64pfr0_el1()2394 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3), in get_hyp_id_aa64pfr0_el1()
1214 return FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer), tmp); in kvm_arm_pmu_get_pmuver_limit()
1083 #define ARM64_FEATURE_MASK(x) (x##_MASK)722 #define ARM64_FEATURE_MASK( global() macro