| /linux/arch/mips/include/asm/mach-ip32/ |
| H A D | kmalloc.h | 7 #define ARCH_DMA_MINALIGN 32 macro
9 #define ARCH_DMA_MINALIGN 128 macro
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| /linux/arch/riscv/mm/ |
| H A D | dma-noncoherent.c | 15 int dma_cache_alignment __ro_after_init = ARCH_DMA_MINALIGN;
133 WARN_TAINT(!coherent && riscv_cbom_block_size > ARCH_DMA_MINALIGN, in arch_setup_dma_ops()
137 ARCH_DMA_MINALIGN, riscv_cbom_block_size); in arch_setup_dma_ops()
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| /linux/drivers/usb/core/ |
| H A D | buffer.c | 39 if (ARCH_DMA_MINALIGN <= 32) in usb_init_pool_max()
41 else if (ARCH_DMA_MINALIGN <= 64) in usb_init_pool_max()
43 else if (ARCH_DMA_MINALIGN <= 128) in usb_init_pool_max()
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| /linux/arch/arm64/mm/ |
| H A D | dma-mapping.c | 45 WARN_TAINT(!coherent && cls > ARCH_DMA_MINALIGN, in arch_setup_dma_ops()
49 ARCH_DMA_MINALIGN, cls); in arch_setup_dma_ops()
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| /linux/arch/parisc/include/asm/ |
| H A D | cache.h | 24 #define ARCH_DMA_MINALIGN 128 macro
26 #define ARCH_DMA_MINALIGN 32 macro
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| /linux/arch/arm64/include/asm/ |
| H A D | cache.h | 35 #define ARCH_DMA_MINALIGN (128) macro
83 return cwg ? 4 << cwg : ARCH_DMA_MINALIGN; in cache_line_size_of_cpu()
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| /linux/include/linux/ |
| H A D | cache.h | 185 #ifdef ARCH_DMA_MINALIGN
188 #define ARCH_DMA_MINALIGN __alignof__(unsigned long long) macro
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| H A D | dma-map-ops.h | 290 if (size >= 2 * ARCH_DMA_MINALIGN || in dma_kmalloc_size_aligned()
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| H A D | dma-mapping.h | 582 return ARCH_DMA_MINALIGN; in dma_get_cache_alignment()
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| /linux/arch/mips/include/asm/mach-n64/ |
| H A D | kmalloc.h | 6 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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| /linux/arch/mips/include/asm/mach-generic/ |
| H A D | kmalloc.h | 10 #define ARCH_DMA_MINALIGN 128 macro
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| /linux/arch/mips/include/asm/mach-tx49xx/ |
| H A D | kmalloc.h | 5 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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| /linux/arch/m68k/include/asm/ |
| H A D | cache.h | 12 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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| /linux/arch/microblaze/include/asm/ |
| H A D | cache.h | 22 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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| /linux/arch/arm/include/asm/ |
| H A D | cache.h | 18 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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| /linux/arch/hexagon/include/asm/ |
| H A D | cache.h | 15 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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| /linux/arch/nios2/include/asm/ |
| H A D | cache.h | 21 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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| /linux/arch/sh/include/asm/ |
| H A D | cache.h | 21 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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| /linux/include/crypto/ |
| H A D | algapi.h | 27 #ifdef ARCH_DMA_MINALIGN
28 #define CRYPTO_DMA_ALIGN ARCH_DMA_MINALIGN
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| /linux/arch/xtensa/include/asm/ |
| H A D | cache.h | 32 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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| /linux/arch/csky/include/asm/ |
| H A D | cache.h | 11 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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| /linux/arch/arc/include/asm/ |
| H A D | cache.h | 52 #define ARCH_DMA_MINALIGN SMP_CACHE_BYTES macro
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| /linux/arch/powerpc/include/asm/ |
| H A D | cache.h | 37 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
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| /linux/drivers/counter/ |
| H A D | counter-core.c | 38 unsigned long privdata[] __aligned(ARCH_DMA_MINALIGN);
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| /linux/drivers/gpu/drm/ |
| H A D | drm_managed.c | 55 u8 __aligned(ARCH_DMA_MINALIGN) data[];
|