Searched refs:AMDGPU_MAX_MES_INST_PIPES (Results 1 – 2 of 2) sorted by relevance
70 #define AMDGPU_MAX_MES_INST_PIPES \ macro96 struct amdgpu_ring ring[AMDGPU_MAX_MES_INST_PIPES];97 spinlock_t ring_lock[AMDGPU_MAX_MES_INST_PIPES];102 struct amdgpu_bo *ucode_fw_obj[AMDGPU_MAX_MES_INST_PIPES];103 uint64_t ucode_fw_gpu_addr[AMDGPU_MAX_MES_INST_PIPES];104 uint32_t *ucode_fw_ptr[AMDGPU_MAX_MES_INST_PIPES];108 struct amdgpu_bo *data_fw_obj[AMDGPU_MAX_MES_INST_PIPES];109 uint64_t data_fw_gpu_addr[AMDGPU_MAX_MES_INST_PIPES];110 uint32_t *data_fw_ptr[AMDGPU_MAX_MES_INST_PIPES];114 struct amdgpu_bo *eop_gpu_obj[AMDGPU_MAX_MES_INST_PIPES];[all …]
5062 for (i = 0; i < AMDGPU_MAX_MES_INST_PIPES; i++) { in amdgpu_device_pre_asic_reset()