Searched refs:AMDGPU_HW_IP_GFX (Results 1 – 11 of 11) sorted by relevance
257 case AMDGPU_HW_IP_GFX: in amdgpu_userq_get_doorbell_index()408 if (args->in.ip_type != AMDGPU_HW_IP_GFX && in amdgpu_userq_create()421 (args->in.ip_type != AMDGPU_HW_IP_GFX) && in amdgpu_userq_create()507 ((queue->queue_type == AMDGPU_HW_IP_GFX) || in amdgpu_userq_create()925 if (!(ip_mask & ((1 << AMDGPU_HW_IP_GFX) | (1 << AMDGPU_HW_IP_COMPUTE)))) in amdgpu_userq_stop_sched_for_enforce_isolation()936 if (((queue->queue_type == AMDGPU_HW_IP_GFX) || in amdgpu_userq_stop_sched_for_enforce_isolation()960 if (!(ip_mask & ((1 << AMDGPU_HW_IP_GFX) | (1 << AMDGPU_HW_IP_COMPUTE)))) in amdgpu_userq_start_sched_for_enforce_isolation()970 if (((queue->queue_type == AMDGPU_HW_IP_GFX) || in amdgpu_userq_start_sched_for_enforce_isolation()
46 [AMDGPU_HW_IP_GFX] = "gfx",
36 [AMDGPU_HW_IP_GFX] = 1,149 case AMDGPU_HW_IP_GFX: in amdgpu_ctx_get_hw_prio()828 if (hw_ip == AMDGPU_HW_IP_COMPUTE || hw_ip == AMDGPU_HW_IP_GFX) { in amdgpu_ctx_set_entity_priority()
180 case AMDGPU_HW_IP_GFX: in amdgpu_ip_get_block_type()409 case AMDGPU_HW_IP_GFX: in amdgpu_hw_ip_info()1353 case AMDGPU_HW_IP_GFX: in amdgpu_info_ioctl()
72 AMDGPU_RING_TYPE_GFX = AMDGPU_HW_IP_GFX,
519 case AMDGPU_HW_IP_GFX: in amdgpu_set_xcp_id()
1430 adev->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_mes_funcs; in gfx_v12_0_sw_init()3705 if (adev->userq_funcs[AMDGPU_HW_IP_GFX]) { in gfx_v12_0_set_userq_eop_interrupts()5670 adev->mqds[AMDGPU_HW_IP_GFX].mqd_size = in gfx_v12_0_set_mqd_funcs()5672 adev->mqds[AMDGPU_HW_IP_GFX].init_mqd = in gfx_v12_0_set_mqd_funcs()
1619 adev->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_mes_funcs; in gfx_v11_0_sw_init()1631 adev->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_mes_funcs; in gfx_v11_0_sw_init()4831 if (adev->userq_funcs[AMDGPU_HW_IP_GFX]) { in gfx_v11_0_set_userq_eop_interrupts()7398 adev->mqds[AMDGPU_HW_IP_GFX].mqd_size = in gfx_v11_0_set_mqd_funcs()7400 adev->mqds[AMDGPU_HW_IP_GFX].init_mqd = in gfx_v11_0_set_mqd_funcs()
379 if (chunk_ib->ip_type == AMDGPU_HW_IP_GFX && in amdgpu_cs_p2_ib()
10055 adev->mqds[AMDGPU_HW_IP_GFX].mqd_size = in gfx_v10_0_set_mqd_funcs()10057 adev->mqds[AMDGPU_HW_IP_GFX].init_mqd = in gfx_v10_0_set_mqd_funcs()
877 #define AMDGPU_HW_IP_GFX 0 macro