Searched refs:AMDGPU_HW_IP_COMPUTE (Results 1 – 9 of 9) sorted by relevance
155 if (queue->queue_type == AMDGPU_HW_IP_COMPUTE) in amdgpu_userq_hang_detect_work()501 case AMDGPU_HW_IP_COMPUTE: in amdgpu_userq_get_doorbell_index()742 (queue->queue_type != AMDGPU_HW_IP_COMPUTE))) { in amdgpu_userq_create()811 args->in.ip_type != AMDGPU_HW_IP_COMPUTE) { in amdgpu_userq_input_args_validate()819 (args->in.ip_type != AMDGPU_HW_IP_COMPUTE) && in amdgpu_userq_input_args_validate()1434 if (!(ip_mask & ((1 << AMDGPU_HW_IP_GFX) | (1 << AMDGPU_HW_IP_COMPUTE)))) in amdgpu_userq_stop_sched_for_enforce_isolation()1445 (queue->queue_type == AMDGPU_HW_IP_COMPUTE)) && in amdgpu_userq_stop_sched_for_enforce_isolation()1467 if (!(ip_mask & ((1 << AMDGPU_HW_IP_GFX) | (1 << AMDGPU_HW_IP_COMPUTE)))) in amdgpu_userq_start_sched_for_enforce_isolation()1479 (queue->queue_type == AMDGPU_HW_IP_COMPUTE)) && in amdgpu_userq_start_sched_for_enforce_isolation()
37 [AMDGPU_HW_IP_COMPUTE] = 4,150 case AMDGPU_HW_IP_COMPUTE: in amdgpu_ctx_get_hw_prio()809 if (hw_ip == AMDGPU_HW_IP_COMPUTE || hw_ip == AMDGPU_HW_IP_GFX) { in amdgpu_ctx_set_entity_priority()
353 if (queue->queue_type == AMDGPU_HW_IP_COMPUTE) { in mes_userq_mqd_create()
390 mqd_size = adev->mqds[AMDGPU_HW_IP_COMPUTE].mqd_size; in amdgpu_gfx_mqd_reset_restore()415 u32 compute_mqd_size = max(adev->mqds[AMDGPU_HW_IP_COMPUTE].mqd_size, mqd_size); in amdgpu_gfx_mqd_sw_init()
1444 adev->userq_funcs[AMDGPU_HW_IP_COMPUTE] = &userq_mes_funcs; in gfx_v12_0_sw_init()3716 if (adev->userq_funcs[AMDGPU_HW_IP_COMPUTE]) { in gfx_v12_0_set_userq_eop_interrupts()5542 adev->mqds[AMDGPU_HW_IP_COMPUTE].mqd_size = in gfx_v12_0_set_mqd_funcs()5544 adev->mqds[AMDGPU_HW_IP_COMPUTE].init_mqd = in gfx_v12_0_set_mqd_funcs()
1659 adev->userq_funcs[AMDGPU_HW_IP_COMPUTE] = &userq_mes_funcs; in gfx_v11_0_sw_init()1671 adev->userq_funcs[AMDGPU_HW_IP_COMPUTE] = &userq_mes_funcs; in gfx_v11_0_sw_init()4877 if (adev->userq_funcs[AMDGPU_HW_IP_COMPUTE]) { in gfx_v11_0_set_userq_eop_interrupts()7287 adev->mqds[AMDGPU_HW_IP_COMPUTE].mqd_size = in gfx_v11_0_set_mqd_funcs()7289 adev->mqds[AMDGPU_HW_IP_COMPUTE].init_mqd = in gfx_v11_0_set_mqd_funcs()
2565 AMDGPU_MQD_SIZE_ALIGN(adev->mqds[AMDGPU_HW_IP_COMPUTE].mqd_size); in gfx_v12_1_compute_mqd_init()4321 adev->mqds[AMDGPU_HW_IP_COMPUTE].mqd_size = in gfx_v12_1_set_mqd_funcs()4323 adev->mqds[AMDGPU_HW_IP_COMPUTE].init_mqd = in gfx_v12_1_set_mqd_funcs()
10063 adev->mqds[AMDGPU_HW_IP_COMPUTE].mqd_size = in gfx_v10_0_set_mqd_funcs()10065 adev->mqds[AMDGPU_HW_IP_COMPUTE].init_mqd = in gfx_v10_0_set_mqd_funcs()
936 #define AMDGPU_HW_IP_COMPUTE 1 macro