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Searched refs:AMDGPU_GMC_HOLE_MASK (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_seq64.c95 seq64_addr = amdgpu_seq64_get_va_base(adev) & AMDGPU_GMC_HOLE_MASK; in amdgpu_seq64_map()
H A Damdgpu_gmc.h48 #define AMDGPU_GMC_HOLE_MASK (adev->vm_manager.max_level == 4 ?\ macro
H A Dmes_userqueue.c46 wptr &= AMDGPU_GMC_HOLE_MASK; in mes_userq_create_wptr_mapping()
H A Damdgpu_dev_coredump.c367 va_start = coredump->ibs[i].gpu_addr & AMDGPU_GMC_HOLE_MASK; in amdgpu_devcoredump_format()
H A Damdgpu_userq_fence.c378 addr &= AMDGPU_GMC_HOLE_MASK; in amdgpu_userq_fence_read_wptr()
H A Dgmc_v12_0.c920 adev->gmc.mc_mask = AMDGPU_GMC_HOLE_MASK; in gmc_v12_0_sw_init()
H A Damdgpu_kms.c1495 uint64_t csa_addr = amdgpu_csa_vaddr(adev) & AMDGPU_GMC_HOLE_MASK; in amdgpu_driver_open_kms()
1567 uint64_t csa_addr = amdgpu_csa_vaddr(adev) & AMDGPU_GMC_HOLE_MASK; in amdgpu_driver_postclose_kms()
H A Damdgpu_gem.c848 args->va_address &= AMDGPU_GMC_HOLE_MASK; in amdgpu_gem_va_ioctl()
H A Damdgpu_userq.c231 user_addr = (addr & AMDGPU_GMC_HOLE_MASK) >> AMDGPU_GPU_PAGE_SHIFT; in amdgpu_userq_input_va_validate()
H A Dvcn_v4_0.c1836 addr &= AMDGPU_GMC_HOLE_MASK; in vcn_v4_0_dec_msg()
H A Dvcn_v3_0.c1920 addr &= AMDGPU_GMC_HOLE_MASK; in vcn_v3_0_dec_msg()