Searched refs:AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP (Results 1 – 5 of 5) sorted by relevance
333 AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP = 0, enumerator
3142 AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP, in gfx_v6_0_sw_init()3375 case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP: in gfx_v6_0_set_eop_interrupt_state()
997 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + ring->pipe; in gfx_v12_0_gfx_ring_init()3752 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + p; in gfx_v12_0_set_userq_eop_interrupts()4828 case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP: in gfx_v12_0_set_eop_interrupt_state()
1167 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + ring->pipe; in gfx_v11_0_gfx_ring_init()4914 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + p; in gfx_v11_0_set_userq_eop_interrupts()6490 case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP: in gfx_v11_0_set_eop_interrupt_state()
2347 AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP, in gfx_v9_0_sw_init()2365 AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP, hw_prio, in gfx_v9_0_sw_init()6180 case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP: in gfx_v9_0_set_eop_interrupt_state()