Searched refs:AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP (Results 1 – 6 of 6) sorted by relevance
999 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + ring->pipe; in gfx_v12_0_gfx_ring_init()3702 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + p; in gfx_v12_0_set_userq_eop_interrupts()3753 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + p; in gfx_v12_0_set_userq_eop_interrupts()3758 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + p; in gfx_v12_0_set_userq_eop_interrupts()4849 case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP: in gfx_v12_0_set_eop_interrupt_state()
333 AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP = 0, enumerator
1184 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + ring->pipe; in gfx_v11_0_gfx_ring_init()4863 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + p; in gfx_v11_0_set_userq_eop_interrupts()4914 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + p; in gfx_v11_0_set_userq_eop_interrupts()4919 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + p; in gfx_v11_0_set_userq_eop_interrupts()6512 case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP: in gfx_v11_0_set_eop_interrupt_state()
2348 AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP, in gfx_v9_0_sw_init()2366 AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP, hw_prio, in gfx_v9_0_sw_init()6233 case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP: in gfx_v9_0_set_eop_interrupt_state()
1986 AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP, in gfx_v8_0_sw_init()6379 case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP: in gfx_v8_0_set_eop_interrupt_state()
4674 irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + ring->pipe; in gfx_v10_0_gfx_ring_init()9157 case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP: in gfx_v10_0_set_eop_interrupt_state()